JPS57123595A - Fixed storage device - Google Patents

Fixed storage device

Info

Publication number
JPS57123595A
JPS57123595A JP852681A JP852681A JPS57123595A JP S57123595 A JPS57123595 A JP S57123595A JP 852681 A JP852681 A JP 852681A JP 852681 A JP852681 A JP 852681A JP S57123595 A JPS57123595 A JP S57123595A
Authority
JP
Japan
Prior art keywords
diffused
gate input
wirings
input wirings
mostrs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP852681A
Other languages
Japanese (ja)
Inventor
Minoru Takada
Michio Kurihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP852681A priority Critical patent/JPS57123595A/en
Publication of JPS57123595A publication Critical patent/JPS57123595A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements

Landscapes

  • Read Only Memory (AREA)

Abstract

PURPOSE:To shorten the setup time of an ROM by reducing diffused capacitors and diffused resistances by inserting MOS transistors (TR) in series between output terminals and a power line arranged in parallel to gate input wirings, and by connecting the gate input wirings to the MOSTRs selectively. CONSTITUTION:A power line V is arranged in parallel to gate input wirings (a)-(i) each provided with an output buffer circuit Bv at one terminal and extending in one direction. Between the line V and output terminals A-C, MOSTRs TR1, TR2, TR3 and TR4, and TR5 and TR6 are connected in series, and the gates of the TR1-TR6 are connected to the wirings (a)-(i) selectively, thereby minimizing the lengths of a diffused wiring connecting with the source of the TR1, a diffused wiring C connecting the TR1 and TR2, and a diffused wiring connecting the drain of the TR2 and terminal A. Other couples of TRs are the same and diffused capacitors and diffused resistances are reduced to shorten the setup time of an ROM.
JP852681A 1981-01-22 1981-01-22 Fixed storage device Pending JPS57123595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP852681A JPS57123595A (en) 1981-01-22 1981-01-22 Fixed storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP852681A JPS57123595A (en) 1981-01-22 1981-01-22 Fixed storage device

Publications (1)

Publication Number Publication Date
JPS57123595A true JPS57123595A (en) 1982-08-02

Family

ID=11695581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP852681A Pending JPS57123595A (en) 1981-01-22 1981-01-22 Fixed storage device

Country Status (1)

Country Link
JP (1) JPS57123595A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5134770A (en) * 1974-07-11 1976-03-24 Maiyaa Endo Co Ag
US4139756A (en) * 1977-01-03 1979-02-13 General Electric Company Push button switch with secondary push button

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5134770A (en) * 1974-07-11 1976-03-24 Maiyaa Endo Co Ag
US4139756A (en) * 1977-01-03 1979-02-13 General Electric Company Push button switch with secondary push button

Similar Documents

Publication Publication Date Title
JPS55136726A (en) High voltage mos inverter and its drive method
KR850003637A (en) Voltage conversion circuit
KR880012014A (en) BIMOS logic circuit
KR890009000A (en) Digital integrated circuits
KR890009002A (en) Bidirectional I / O Cells
JPS57123595A (en) Fixed storage device
JPS6467795A (en) Reading amplifier
KR910020896A (en) Semiconductor integrated circuit
JPS57203334A (en) Semiconductor integrated circuit device
KR890004465B1 (en) Delay circuit for gate array
KR880004484A (en) Memory cell circuit
JPS5479527A (en) Voltage sense circuit
KR850004876A (en) Static Memory Cell with Double Polycrystalline Structure
JPS57190351A (en) Semiconductor integrated circuit device
SU1474831A1 (en) G-flip-flop
JPS5580922A (en) Complementary mos logic circuit
JPS6468015A (en) Delay circuit
JPS6477142A (en) Semiconductor integrated circuit
JPS6469116A (en) Delay circuit for semiconductor integrated circuit device
JPS57180224A (en) Flip-flop circuit
JPS5556732A (en) Complementary mos-type dynamic logic circuit system
JPS6468122A (en) Semiconductor integrated circuit device
SU1167725A1 (en) Voltage level converter
JPS5441027A (en) Memory output circuit
JPS5373961A (en) Logic circuit