JPS6468015A - Delay circuit - Google Patents
Delay circuitInfo
- Publication number
- JPS6468015A JPS6468015A JP62225876A JP22587687A JPS6468015A JP S6468015 A JPS6468015 A JP S6468015A JP 62225876 A JP62225876 A JP 62225876A JP 22587687 A JP22587687 A JP 22587687A JP S6468015 A JPS6468015 A JP S6468015A
- Authority
- JP
- Japan
- Prior art keywords
- inverters
- channel
- stage
- inverter
- stages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Pulse Circuits (AREA)
Abstract
PURPOSE:To constitute a circuit of equivalently smaller number of stages of inverters by effectively using the gate polysilicon parasitic resistance of an internal cell to increase the extent of delay per one stage of inverters. CONSTITUTION:The drain of a P-channel transistor TR 15 and that of an N- channel TR 16 are connected through parasitic resistances 31-34 of respective gates of a P-channel TR 26 and an N-channel TR 26 in the succeeding stage. Consequently, polysilicon gate parasitic resistances 31-34 of the inverter in the succeeding stage are added extra to the output impedance of the inverter to increase the propagation delay time per one stage of inverters. Thus, a certain extent of delay is obtained by a smaller number of stages of inverters.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62225876A JPS6468015A (en) | 1987-09-08 | 1987-09-08 | Delay circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62225876A JPS6468015A (en) | 1987-09-08 | 1987-09-08 | Delay circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6468015A true JPS6468015A (en) | 1989-03-14 |
Family
ID=16836243
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62225876A Pending JPS6468015A (en) | 1987-09-08 | 1987-09-08 | Delay circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6468015A (en) |
-
1987
- 1987-09-08 JP JP62225876A patent/JPS6468015A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE69131399T2 (en) | BASIC CELL FOR BICMOS GATTERFELD | |
| JPS6453446A (en) | Detection amplifier whose layout is optimized in c-mos dynamic ram | |
| KR890016665A (en) | Semiconductor Integrated Circuits with Biplane Transistors and MOSFETs | |
| JPS6468015A (en) | Delay circuit | |
| JPS57100746A (en) | Semiconductor integrated circuit device | |
| FR2379945A1 (en) | Matching circuit for logic systems - has three MOSFETs in drain-source series between supply poles | |
| JPS5749253A (en) | Semiconductor integrated circuit | |
| JPS5731043A (en) | Semiconductor operating circuit | |
| JPS5469947A (en) | Hysteresis circuit | |
| US4649290A (en) | Pulse generating circuit | |
| JPS553252A (en) | Preset circuit | |
| JPS56162517A (en) | Current miller circuit | |
| KR890004465B1 (en) | Delay circuit for gate array | |
| JPS5767319A (en) | Amplifier with variable threshold voltage | |
| JPS57109427A (en) | Semiconductor integrated circuit device | |
| JPS564932A (en) | Tristate circuit | |
| JPS5441027A (en) | Memory output circuit | |
| EP0102670A3 (en) | Tri-state circuit element | |
| SU1363189A1 (en) | Carry-forming unit | |
| JPS6484636A (en) | Manufacture of mos gate array | |
| SU1429315A2 (en) | Nor gate | |
| JPS55104135A (en) | Semiconductor logic circuit | |
| FR2352449A1 (en) | Integrated complementary MOS transistor logic circuit - has four pairs of MOS transistors connected to provide three stable states of circuit | |
| JPS5486239A (en) | Semiconductor integrated circuit | |
| JPS6468122A (en) | Semiconductor integrated circuit device |