JPS5469947A - Hysteresis circuit - Google Patents
Hysteresis circuitInfo
- Publication number
- JPS5469947A JPS5469947A JP13851777A JP13851777A JPS5469947A JP S5469947 A JPS5469947 A JP S5469947A JP 13851777 A JP13851777 A JP 13851777A JP 13851777 A JP13851777 A JP 13851777A JP S5469947 A JPS5469947 A JP S5469947A
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- circuit
- complementary
- hysteresis
- complementary mos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To obtain a hysteresis circuit using a small number of constituting elements, by changing the impedance of a complementary MOS by connecting P and N channel MOS transistors in parallel to an inverter circuit composed of the complementary MOS transistor. CONSTITUTION:This hysteresis circuit consists of inverter circuit 11 composed of a complementary MOS transistor, the 2nd complementary circuit composed of MOSTP2 and MOSTN2 connected in parallel to circuit 11, and the switching method which makes either 2nd complementary MOS conduct corresponding to the output level of inverter 11. This switching method employs complementary inverter 12, and makes its switching using the threshold potential of inverter 12. Solid lines A and B represent characteristics at the time when either TP2 or TN2 conducts, and they are nearly oval hysteresis characteristics, by more excellent hysteresis characteristics can be obtained through the waveform shaping of inverter 12.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13851777A JPS5469947A (en) | 1977-11-15 | 1977-11-15 | Hysteresis circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13851777A JPS5469947A (en) | 1977-11-15 | 1977-11-15 | Hysteresis circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5469947A true JPS5469947A (en) | 1979-06-05 |
Family
ID=15223988
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13851777A Pending JPS5469947A (en) | 1977-11-15 | 1977-11-15 | Hysteresis circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5469947A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56136033A (en) * | 1980-03-26 | 1981-10-23 | Nec Corp | Complementary mos integrated circuit |
JPS605621A (en) * | 1983-06-24 | 1985-01-12 | Hitachi Ltd | Asynchronous signal synchronizing circuit |
US5455527A (en) * | 1992-09-18 | 1995-10-03 | Siemens Aktiengesellschaft | CMOS buffer circuit with controlled current source |
JP2009124465A (en) * | 2007-11-15 | 2009-06-04 | Seiko Epson Corp | Noise filter circuit, noise filtering method, thermal head driver, thermal head, electronic instrument, and printing system |
JP2009147742A (en) * | 2007-12-14 | 2009-07-02 | Seiko Epson Corp | Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, thermal head, control circuit, electronic instrument, and print system |
-
1977
- 1977-11-15 JP JP13851777A patent/JPS5469947A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56136033A (en) * | 1980-03-26 | 1981-10-23 | Nec Corp | Complementary mos integrated circuit |
JPS605621A (en) * | 1983-06-24 | 1985-01-12 | Hitachi Ltd | Asynchronous signal synchronizing circuit |
US5455527A (en) * | 1992-09-18 | 1995-10-03 | Siemens Aktiengesellschaft | CMOS buffer circuit with controlled current source |
JP2009124465A (en) * | 2007-11-15 | 2009-06-04 | Seiko Epson Corp | Noise filter circuit, noise filtering method, thermal head driver, thermal head, electronic instrument, and printing system |
JP2009147742A (en) * | 2007-12-14 | 2009-07-02 | Seiko Epson Corp | Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, thermal head, control circuit, electronic instrument, and print system |
US7872491B2 (en) | 2007-12-14 | 2011-01-18 | Seiko Epson Corporation | Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, and electronic instrument |
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