JPS5442948A - Ternary converter circuit - Google Patents

Ternary converter circuit

Info

Publication number
JPS5442948A
JPS5442948A JP10913877A JP10913877A JPS5442948A JP S5442948 A JPS5442948 A JP S5442948A JP 10913877 A JP10913877 A JP 10913877A JP 10913877 A JP10913877 A JP 10913877A JP S5442948 A JPS5442948 A JP S5442948A
Authority
JP
Japan
Prior art keywords
output
converter circuit
ternary converter
fet
ternary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10913877A
Other languages
Japanese (ja)
Other versions
JPS567331B2 (en
Inventor
Yasoji Suzuki
Ryuzo Shiraki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10913877A priority Critical patent/JPS5442948A/en
Priority to US05/941,256 priority patent/US4217502A/en
Publication of JPS5442948A publication Critical patent/JPS5442948A/en
Publication of JPS567331B2 publication Critical patent/JPS567331B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Abstract

PURPOSE:To improve the rise time of the output voltage for the circuit which converts the high voltage input to the low voltage output and obtains three output states, by connecting in parallel the FET series circuits which receive application of the back gate bias and complements the output current of IG-FET.
JP10913877A 1977-09-10 1977-09-10 Ternary converter circuit Granted JPS5442948A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10913877A JPS5442948A (en) 1977-09-10 1977-09-10 Ternary converter circuit
US05/941,256 US4217502A (en) 1977-09-10 1978-09-11 Converter producing three output states

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10913877A JPS5442948A (en) 1977-09-10 1977-09-10 Ternary converter circuit

Publications (2)

Publication Number Publication Date
JPS5442948A true JPS5442948A (en) 1979-04-05
JPS567331B2 JPS567331B2 (en) 1981-02-17

Family

ID=14502549

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10913877A Granted JPS5442948A (en) 1977-09-10 1977-09-10 Ternary converter circuit

Country Status (1)

Country Link
JP (1) JPS5442948A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55166312A (en) * 1979-06-13 1980-12-25 Nec Corp Linear voltage-current converter
JPS57203334A (en) * 1981-06-08 1982-12-13 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPH04117029A (en) * 1990-08-31 1992-04-17 Nec Ic Microcomput Syst Ltd Level-down circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55166312A (en) * 1979-06-13 1980-12-25 Nec Corp Linear voltage-current converter
JPS6221404B2 (en) * 1979-06-13 1987-05-12 Nippon Electric Co
JPS57203334A (en) * 1981-06-08 1982-12-13 Mitsubishi Electric Corp Semiconductor integrated circuit device
JPH04117029A (en) * 1990-08-31 1992-04-17 Nec Ic Microcomput Syst Ltd Level-down circuit

Also Published As

Publication number Publication date
JPS567331B2 (en) 1981-02-17

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