JPS6221404B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a linear voltage-to-current converter with an output current proportional to the input voltage, sometimes suitable for monolithic integration.

In the conventional voltage-to-current converter, as shown in FIG.
The collector of the transistor 13 is connected to the power supply terminal 14, and the emitter of the transistor 13 is connected to the inverting input side of the operational amplifier 12 and grounded through the resistor 15. Due to the action of operational amplifier 12, the voltage on its inverting input side becomes equal to the signal voltage, and therefore a current flows through resistor 15 in accordance with the signal voltage.

Alternatively, as shown in FIG. 1B, the signal voltage of the voltage signal source 11 is supplied through the resistor 15 to the inverting input side of the operational amplifier 12 and the emitter of the transistor 13, with the collector of the transistor 13 connected to the power supply terminal 14 and the base connected to the operational input terminal. It was connected to the output side of the amplifier 12, and the non-inverting input side of the operational amplifier 12 was grounded.

These conventional converters have been made by monolithically integrated operational amplifiers, single resistors and single transistors to achieve the first goal, or by monolithically integrating all components to achieve the second goal. The first achievement means is increasing the mounting area;
It has the common drawbacks of component circuits made of individual components, such as increased mounting costs and decreased reliability. On the other hand, in the second means of achievement, all the circuits are integrated, but when all the circuits including the operational amplifier are integrated, it occupies a large chip area, and in particular, the operating current range is low and the resistance is high. The required circuit required a significant increase in chip area, making it difficult to implement.

Furthermore, the common drawbacks of the first and second implementation means are that the upper limit of the operating frequency band is severely restricted due to the frequency compensation of the operational amplifier, and that the compensation capacitance occupies a large area within the integrated circuit. As a result, the chip cost of the operational amplifier was high, and only unipolar inputs and outputs could be obtained.

The object of the invention is to provide a voltage-to-current converter that can be monolithically integrated without the need for diffused resistors and operational amplifiers, with a significant improvement in the operating frequency band and occupying a very small chip area. . In particular, voltage-to-current converters that require low current output require a large chip area that is practically impossible to integrate with conventional circuits, but the voltage-to-current converter of this invention The device does not use resistors and can be constructed using only active elements (FETs) that are easy to manufacture in integrated circuits, occupying only a small chip area and allowing monolithic integration.

According to the present invention, first and second current source circuits each made up of field effect transistors are provided. The drain current-gate voltage characteristics of the field effect transistors in both current source circuits both have square characteristics, and the quadratic coefficients of the square characteristics are approximately equal, but they are shifted from each other in the gate voltage axis direction. There is. Such first and second current source circuits are simultaneously controlled by a common input voltage, and the difference between their output currents is extracted by an output circuit. In this way, the difference current has a linear relationship with the input voltage. Also, this converter can be constructed without using operational amplifiers and resistors.

Next, the voltage-current converter according to the present invention will be explained with reference to the drawings from FIG. 2 onwards.

FIGS. 2 and 3 are diagrams for explaining the principle of this invention. Generally, when y is a quadratic function of x, linearity with respect to the amount of change in y in a constant area of x away from the apex of this quadratic function improves as the constant area moves away from the apex. In other words, if linearity is linearity = linearity error / amount of change in y corresponding to a constant change in x, then the linearity error for a constant change in x is constant regardless of the position with respect to the vertex of the constant area. The linearity is improved because the amount of change in y corresponding to y increases as the constant region moves away from the vertex.

FIG. 2 illustrates a quadratic function with vertices at x=B and y=0, and line 16 represents this quadratic function y=A(x-
B) ² , and line 17 shows the linearity in the constant change (2B) region of x from 3B to 5B, and this straight line is y = 6ABx -
It can be expressed as 14AB ² . Line 18 shows linearity in the constant change (2B) region of x from B to 3B, and this straight line is y = 2ABx -
It can be expressed as 2AB ² . The amount of change in y corresponding to the change in x from B to 3B is 4AB ² , and the maximum error between the quadratic function curve 16 and the straight line 18, that is, the linearity error 19, is AB ² . On the other hand, from 3B of x
Although the amount of change in y corresponding to the change to 5B increases to 12AB ² , the maximum error between the quadratic function curve 16 and the straight line 17, ie, the linearity error 21, does not change from AB ² .
The linearity of this x in a constant region from 3B to 5B is
AB ² /12AB ² = 8%.

As the above explanation suggests, x far from the vertex
By using a constant region of , this linearity is significantly improved. It is possible to realize such characteristics as an electronic circuit. It is known that the drain current of a field effect transistor with respect to the gate-source input voltage has a very good quadratic characteristic. In FIG. 2, the x-axis can correspond to the gate-source voltage, the y-axis can correspond to the drain current, and B can correspond to the threshold voltage. Therefore, by operating this field effect transistor in a constant region of high gate-source voltage, the change in drain current within that region becomes relatively linear. However, this implementation means is not effective because the input signal range is restricted, an unnecessarily high voltage power supply is required, and the power consumption is also large. However, by taking some additional measures,
It becomes possible to obtain an operating region with very good linearity.

In FIG. 3, the curve 22 represents the first quadratic function y=
Ax ² is shown, and the curve 23 shows a second quadratic function y=A(x-2B) ² having the same quadratic coefficient as the curve 22. The difference between curves 22 and 23 is a straight line because the quadratic coefficients are equal, and straight line 24 is this straight line y=
4ABx - 4AB ² is shown. It is still possible to realize such characteristics as an electronic circuit. An example of the first implementation means is the threshold voltage V
It is an electronic circuit composed of a pair of field effect transistors (hereinafter referred to as FETs) that differ only in _T and have the same characteristics in other respects. In general, the threshold voltage V _T
This difference can be achieved by doping impurities into the FET channel by ion implantation. Mobility changes depending on the impurity doped into the channel. This amount of change corresponds to the amount of impurity doping or the amount of difference in threshold voltage V _T , and if the amount of difference is determined in advance, the amount of change in mobility can be determined. By presetting the shape ratio of the FET that compensates for this amount of change in mobility as an integrated circuit pattern, it is possible to create a well-matched FET with a difference in threshold voltage V _T .
The pair can be implemented as an integrated circuit.

An example of the second implementation means is an electronic circuit composed of two sets of current sources in which a plurality of FETs having the same threshold voltage are connected in series. An example of the third implementation means is a metal oxide film using a different metal as the gate material.
It is an electronic circuit composed of FETs (MOSFETs).
In this pair of MOSFETs, a difference in the work function (φMS) occurs due to the difference in gate material, resulting in a pair of FETs with different threshold voltages V _T .

Ideally, the electronic circuit shown in the example of the above implementation means has the characteristics 22 and 23 shown in FIG. It is difficult to make the following coefficients exactly equal. When the quadratic coefficients of the functions of curves 22 and 23, that is, the characteristic ratio of the FET pair, are mismatched by 10%, there will be a linearity error of about 2%, and when there is a mismatch of 1%, there will be a linearity error of about 0.2%. In integrated circuit technology, it is currently easy to obtain pairs of about 1%, and it is possible to obtain a highly linear operating region.

FIG. 4 shows a part of the first configuration example of the present invention. first and second current source circuits 25 with quadratic characteristics;
26 are provided, and these first and second current source circuits 2
5 and 26 are controlled by an input voltage from a common input terminal 27, and a current corresponding to the input voltage flows through output terminals 28 and 29. These currents are commonly absorbed by the current absorbing section through the terminal 31.

As illustrated in FIG.
Output from 29. The difference between the output currents of terminals 28 and 29 is the difference between the output currents of input terminal 2 and 29, as illustrated by the straight line 24 in FIG.
It has linearity with respect to the voltage applied to 7.

FIG. 5 shows a part of another configuration example of the present invention, which is a circuit configured to obtain a differential output in response to a differential input. With this configuration, zero differential output can be obtained in response to zero differential input. In FIG. 5, parts common to those in FIG. 4 are given the same numbers. 1st
A third current source circuit 32 having the same characteristics as the current source circuit 25 is provided, and its output terminal 33 is connected to the second current source circuit 32.
It is connected to the second output terminal 34 together with the output terminal 29 of the current source circuit 26 . Further, a fourth current source circuit 3 having the same characteristics as the second current source circuit 26
5 is provided, and its output terminal 36 is connected to the first output terminal 3 together with the output terminal 28 of the first current source circuit 25.
Connected to 7. Further, the third and fourth current source circuits 32 and 35 are biased by the input voltage to the second common input terminal 38.

With this configuration, the input to the input terminal 38 is as shown in Fig. 3.
When set to 4B, a differential output current having linearity within a constraint range such as the power supply voltage can be obtained from the output terminals 34 and 37 for an input of 2B or more to the first input terminal 27. Further, this differential operation means that this voltage-current converter has bipolar operation, and the present invention provides new characteristics that cannot be obtained with conventional voltage-current converters.

FIG. 6 shows one embodiment of the present invention, and corresponds to the first configuration example shown in FIG. 1st, 2nd
The first and second current source circuits 25 and 26
FETs are used, and the drains of these FETs 25 and 26 are connected to output terminals 28 and 29, the sources of each are connected to a current absorbing unit (for example, a power supply) through a terminal 31, and the gates of each are connected to a common input. It is connected to terminal 27. 1st, 2nd
The FETs 25 and 26 are a pair of elements that differ only in threshold voltage V _T and have the same characteristics in other respects. The difference in threshold voltage V _T can be obtained by the above-mentioned means.

FIG. 7 shows another embodiment of the invention, and corresponds to the second configuration example shown in FIG. Parts common to those in FIG. 6 are given the same numbers. The third and fourth current source circuits 32 and 35 are composed of FETs, the FET 32 has the same threshold voltage V _T as the FET 25, and its drain is connected to the second output terminal 34 together with the drain of the FET 26. ing.
FET 35 has the same threshold voltage V _T as FET 26 and its drain is connected to the first output terminal 37 together with the drain of FET 25 . or,
The sources of the FETs 25, 26, 32, and 35 are all connected to an arbitrary current absorbing section (for example, a power source) via a terminal 31. Further, the gates of FETs 32 and 35 are both connected to a second common input terminal 38.

If the differential input to the first input terminal 27 and the second input terminal 38 is zero, even if the common mode input varies, the output currents from the output terminals 34 and 37 will be equal, and the differential output will be zero. When a differential input is applied to the input terminals 27 and 38, a differential output is obtained from the output terminals 34 and 37, and the difference between the output currents from the output terminals 34 and 37 becomes a value proportional to the input differential voltage. Does not depend on common mode input. However, the rejection ratio for common-mode input is small, and as an actual circuit, it is necessary to improve the common-mode rejection ratio.

FIG. 8 shows FET25,
A constant current source 41 is added between the source common connection terminal 31 of the transistors 29, 32, and 35 and the current terminal 39. By adding the constant current source 41, the bias level of each FET 25, 26, 32, 35 with respect to the common mode input does not change, and a large common mode rejection ratio can be obtained.

FIG. 9 shows another embodiment of the invention. FET
The drain current is I _d and the gate-source voltage is V _G
If the current amplification factor of _S is β, the voltage of FET25 -
The current characteristic is expressed as I _d1 =β ₁ /2(V _GS1 −V _T ) ² (1). As the second current source circuit 26
FET42 with common _β2 different from FET25
and 43 series connections are used. FET42,43
_The ^voltage _{- current characteristic of _} = 4β ₁ should be set, β ₁
and β ₂ depends on the shape of FET, so FET42
and 43 may be set to four times the shape of FET25. The output current I _p2 from the second constant current source circuit 26 consisting of FETs 42 and 43 is I _p2 = β ₁ /2V _GS1 ² −2β ₁ V _T V _GS1 +2β ₁ V _T ² , and the output current I p2 from the second constant current source circuit 26 consisting of FETs 42 and 43 is The output current I _p1 from the constant current source circuit is I _p1 β ₁ /2V _GS1 ² −β ₁ V _T V _GS1 +1/2β ₁ V _T ² . The differential output between I _p1 and I _p2 is I _pd =β ₁ V _T V _GS1 −3/2β ₁ V _T ² , which is a linear linear relationship.

The embodiment shown in FIG. 10 is a differential version of the embodiment shown in FIG. Parts common to those in FIG. 9 are given the same numbers. The third current source circuit 32 is made up of an FET 32, and the fourth current source circuit 35 is made up of FETs 44 and 45 connected in series. The common source connection point 31 of the FETs 25, 32, 43, 45 is connected directly to the power supply or via a constant current source 41 to the power supply.

FIG. 11 shows an example in which an output circuit 47 is connected from a current mirror circuit to the embodiment of the voltage-current converter 46 of the present invention shown in FIGS. 7, 8, and 10 to provide a single-ended output. A drive or sink current proportional to the differential input can be taken out from the output terminal 48, resulting in bipolar operation. terminal 3
The current flowing through FET 4 flows through FET 49, and this FET 4
The gate of FET 9 is connected to the gate of FET 51, so the same current as that of terminal 37 flows through FET 51 as well. Since the FET 51 and the terminals 34 and 48 are connected, a current equal to the difference between the current flowing through the FET 51 and the current flowing through the terminal 34 flows to the terminal 48. The circuit of this embodiment can be easily integrated as a CMOS monolithic integrated circuit. 6th, 7th,
Embodiments Nos. 8, 9, and 10 can be easily integrated with monolithic integrated circuits containing only n-channel FETs or only p-channel FETs.

As explained above, the voltage-current converter of the present invention uses only active elements and does not require resistors or capacitive elements, so when it is implemented as an integrated circuit, it can have a significantly smaller area than conventional ones. , and can be achieved using an inexpensive manufacturing process for digital MOSLSI. especially digital
In the MOS LSI process, the threshold voltage of the element V _T
can be controlled accurately, and the absolute value of the output current can be easily controlled. Further, in this invention, bipolar operation of differential input and differential output can be obtained, for example, integral type A/
This invention is effective as an input of a D converter and a means for applying a reference signal to an integrator, and the present invention is also important in its application.

Note that the current source circuit is generally configured by connecting multiple FETs in series, and current source circuits 25, 32 and 2 are connected in series.
The number of FETs may be different between 6 and 35.

[Brief explanation of the drawing]

Figures 1A and B are circuit diagrams showing a conventional voltage-current converter, Figure 2 is a quadratic curve diagram for explaining the principle of this invention, and Figure 3 is a diagram for explaining the principle of this invention. FIG. 4 is a block diagram showing one configuration example of this invention, FIG. 5 is a block diagram showing another configuration example of this invention, and FIG. 6 is a block diagram showing the first configuration example of this invention.
FIGS. 7 to 11 are connection diagrams showing other embodiments of the present invention. 25, 26, 32, 34: current source circuit, 27,
38: input terminal, 28, 29, 34, 37: output terminal, 47: output circuit.

Claims (1)

[Claims] 1. A first current source circuit configured with a field effect transistor whose drain current-gate voltage characteristic is a square characteristic, and whose drain current-gate voltage characteristic is approximately equal to the quadratic coefficient of the square characteristic and whose 2
A second field effect transistor, which is shifted in the gate voltage axis direction with respect to the square power characteristic, is constructed of a field effect transistor having a square power characteristic.
a current source circuit, means for applying a common input voltage to the first current source circuit and the second current source circuit, and an output circuit that extracts a difference current between the output currents of the first current source circuit and the second current source circuit. and said first
A field effect transistor that constitutes a current source circuit,
A linear voltage-current converter, characterized in that the field effect transistor constituting the second current source circuit is connected to a common source.