JPS5258450A - Transistor output circuit - Google Patents

Transistor output circuit

Info

Publication number
JPS5258450A
JPS5258450A JP50134074A JP13407475A JPS5258450A JP S5258450 A JPS5258450 A JP S5258450A JP 50134074 A JP50134074 A JP 50134074A JP 13407475 A JP13407475 A JP 13407475A JP S5258450 A JPS5258450 A JP S5258450A
Authority
JP
Japan
Prior art keywords
output circuit
transistor
transistor output
providing
mis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50134074A
Other languages
Japanese (ja)
Inventor
Kazuo Kasuga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50134074A priority Critical patent/JPS5258450A/en
Publication of JPS5258450A publication Critical patent/JPS5258450A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/013Modifications for accelerating switching in bipolar transistor circuits
    • H03K19/0136Modifications for accelerating switching in bipolar transistor circuits by means of a pull-up or down element

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To suppress reactive current and to obtain higher output in the clock driver circuit etc. of MIS.RAM, by providing a transistor between the output terminal and power supply voltage terminal, and by providing a bias circuit operating the transistor in the saturation region.
JP50134074A 1975-11-10 1975-11-10 Transistor output circuit Pending JPS5258450A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50134074A JPS5258450A (en) 1975-11-10 1975-11-10 Transistor output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50134074A JPS5258450A (en) 1975-11-10 1975-11-10 Transistor output circuit

Publications (1)

Publication Number Publication Date
JPS5258450A true JPS5258450A (en) 1977-05-13

Family

ID=15119767

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50134074A Pending JPS5258450A (en) 1975-11-10 1975-11-10 Transistor output circuit

Country Status (1)

Country Link
JP (1) JPS5258450A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55114037A (en) * 1979-02-23 1980-09-03 Hitachi Ltd Output buffer circuit
JPS5733832A (en) * 1980-08-06 1982-02-24 Mitsubishi Electric Corp Output circuit
US5512847A (en) * 1983-01-31 1996-04-30 Hitachi, Ltd. BiCMOS tri-state output driver

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55114037A (en) * 1979-02-23 1980-09-03 Hitachi Ltd Output buffer circuit
JPS5733832A (en) * 1980-08-06 1982-02-24 Mitsubishi Electric Corp Output circuit
US5512847A (en) * 1983-01-31 1996-04-30 Hitachi, Ltd. BiCMOS tri-state output driver

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