JPS5421249A - Logic circuit - Google Patents
Logic circuitInfo
- Publication number
- JPS5421249A JPS5421249A JP8684777A JP8684777A JPS5421249A JP S5421249 A JPS5421249 A JP S5421249A JP 8684777 A JP8684777 A JP 8684777A JP 8684777 A JP8684777 A JP 8684777A JP S5421249 A JPS5421249 A JP S5421249A
- Authority
- JP
- Japan
- Prior art keywords
- logic circuit
- gate
- type fet
- mosfet
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
- H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To establish temporal memory circuit having greater output amplitude, by feeding clock pulse to the gate of P and N type FET and the input signal to the gate of N type FET, in a logic circuit consisting of three MOSFET's different in channel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8684777A JPS5421249A (en) | 1977-07-19 | 1977-07-19 | Logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8684777A JPS5421249A (en) | 1977-07-19 | 1977-07-19 | Logic circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5421249A true JPS5421249A (en) | 1979-02-17 |
Family
ID=13898196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8684777A Pending JPS5421249A (en) | 1977-07-19 | 1977-07-19 | Logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5421249A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4419404A (en) * | 1981-02-16 | 1983-12-06 | Fuji Photo Film Co., Ltd. | Magnetic recording media and process of producing them |
JPH02215154A (en) * | 1989-02-16 | 1990-08-28 | Toshiba Corp | Voltage control circuit |
-
1977
- 1977-07-19 JP JP8684777A patent/JPS5421249A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4419404A (en) * | 1981-02-16 | 1983-12-06 | Fuji Photo Film Co., Ltd. | Magnetic recording media and process of producing them |
JPH02215154A (en) * | 1989-02-16 | 1990-08-28 | Toshiba Corp | Voltage control circuit |
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