JPS56136033A - Complementary mos integrated circuit - Google Patents

Complementary mos integrated circuit

Info

Publication number
JPS56136033A
JPS56136033A JP3837480A JP3837480A JPS56136033A JP S56136033 A JPS56136033 A JP S56136033A JP 3837480 A JP3837480 A JP 3837480A JP 3837480 A JP3837480 A JP 3837480A JP S56136033 A JPS56136033 A JP S56136033A
Authority
JP
Japan
Prior art keywords
noise
inverter
point
input terminal
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3837480A
Other languages
Japanese (ja)
Inventor
Kazuki Yoshitake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3837480A priority Critical patent/JPS56136033A/en
Publication of JPS56136033A publication Critical patent/JPS56136033A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Logic Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To make a complementary MOS integrated circuit tolerant to a noise chatter by providing a resistance between an input terminal and one terminal of a power source and by interposing the inverter of at least a complementary transistor between the input terminal and internal circuit. CONSTITUTION:Inverter HT1 is a CMOS inverter consisting of a series circuit of P channel MOSTR1 and N channel MOSTR2, and a high trip inverter which has a transition point of output ''0'' at a high input voltage by setting ratio gm of MOSTR1<MOSTR2 to about 10:1. Since pull-down resistance RD is connected to the input terminal, the trip point, if a positive noise or chatter mixes into an input, is shifted to the side of power source VDD by inverter HT; unless the noise peak reaches this point, it will not enter the internal circuit and when gm of transistor TR2 is low even if it reaches the point, the noise can not response, so that the noise can be prevented.
JP3837480A 1980-03-26 1980-03-26 Complementary mos integrated circuit Pending JPS56136033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3837480A JPS56136033A (en) 1980-03-26 1980-03-26 Complementary mos integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3837480A JPS56136033A (en) 1980-03-26 1980-03-26 Complementary mos integrated circuit

Publications (1)

Publication Number Publication Date
JPS56136033A true JPS56136033A (en) 1981-10-23

Family

ID=12523501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3837480A Pending JPS56136033A (en) 1980-03-26 1980-03-26 Complementary mos integrated circuit

Country Status (1)

Country Link
JP (1) JPS56136033A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS605621A (en) * 1983-06-24 1985-01-12 Hitachi Ltd Asynchronous signal synchronizing circuit
JPS61174811A (en) * 1985-01-30 1986-08-06 Nec Corp Synchronizing circuit
JPS62227211A (en) * 1986-03-28 1987-10-06 Nec Corp Input synchronizing circuit
JPH0369161A (en) * 1989-08-08 1991-03-25 Nec Ic Microcomput Syst Ltd Cmos input circuit
EP0694391A3 (en) * 1994-07-29 1996-05-15 Canon Kk Printing head and printing apparatus using same
JP2009124465A (en) * 2007-11-15 2009-06-04 Seiko Epson Corp Noise filter circuit, noise filtering method, thermal head driver, thermal head, electronic instrument, and printing system
JP2009147742A (en) * 2007-12-14 2009-07-02 Seiko Epson Corp Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, thermal head, control circuit, electronic instrument, and print system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5421234A (en) * 1977-07-19 1979-02-17 Mitsubishi Electric Corp Input circuit
JPS5469947A (en) * 1977-11-15 1979-06-05 Sanyo Electric Co Ltd Hysteresis circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5421234A (en) * 1977-07-19 1979-02-17 Mitsubishi Electric Corp Input circuit
JPS5469947A (en) * 1977-11-15 1979-06-05 Sanyo Electric Co Ltd Hysteresis circuit

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS605621A (en) * 1983-06-24 1985-01-12 Hitachi Ltd Asynchronous signal synchronizing circuit
JPS61174811A (en) * 1985-01-30 1986-08-06 Nec Corp Synchronizing circuit
JPH0462493B2 (en) * 1985-01-30 1992-10-06 Nippon Electric Co
JPS62227211A (en) * 1986-03-28 1987-10-06 Nec Corp Input synchronizing circuit
JPH0369161A (en) * 1989-08-08 1991-03-25 Nec Ic Microcomput Syst Ltd Cmos input circuit
EP0694391A3 (en) * 1994-07-29 1996-05-15 Canon Kk Printing head and printing apparatus using same
US6054689A (en) * 1994-07-29 2000-04-25 Canon Kabushiki Kaisha Printing head and printing apparatus using same
JP2009124465A (en) * 2007-11-15 2009-06-04 Seiko Epson Corp Noise filter circuit, noise filtering method, thermal head driver, thermal head, electronic instrument, and printing system
JP2009147742A (en) * 2007-12-14 2009-07-02 Seiko Epson Corp Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, thermal head, control circuit, electronic instrument, and print system

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