JPS5612128A - Cmos buffer circuit - Google Patents

Cmos buffer circuit

Info

Publication number
JPS5612128A
JPS5612128A JP8741679A JP8741679A JPS5612128A JP S5612128 A JPS5612128 A JP S5612128A JP 8741679 A JP8741679 A JP 8741679A JP 8741679 A JP8741679 A JP 8741679A JP S5612128 A JPS5612128 A JP S5612128A
Authority
JP
Japan
Prior art keywords
transistor
level
low
circuit
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8741679A
Other languages
Japanese (ja)
Inventor
Masanari Kaizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8741679A priority Critical patent/JPS5612128A/en
Publication of JPS5612128A publication Critical patent/JPS5612128A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To prevent a penetrating current with an input signal by connecting a predriver circuit, which stops the driving of P channel and N channel transistors, to the gates of the transistors of a CMOS inverter. CONSTITUTION:As an input signal to input terminal 11 changes from level ''High'' to level ''Low'', the output of AND circuit 14 starts changing to ''Low and N channel transistor 10 starts turning off. When the output of AND circuit 14 falls to a certain degree and transistor 10 turns off to a certain degree or when the input signal changes to level ''Low'' perfectly, the output of OR circuit 13 starts changing to level ''Low'' with those inputs and P channel transistor 9 conducts gradually, so that only small penetrating current I at the overlap part of the rising part of transistor 9 and the falling part of transistor 10 will flow.
JP8741679A 1979-07-12 1979-07-12 Cmos buffer circuit Pending JPS5612128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8741679A JPS5612128A (en) 1979-07-12 1979-07-12 Cmos buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8741679A JPS5612128A (en) 1979-07-12 1979-07-12 Cmos buffer circuit

Publications (1)

Publication Number Publication Date
JPS5612128A true JPS5612128A (en) 1981-02-06

Family

ID=13914264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8741679A Pending JPS5612128A (en) 1979-07-12 1979-07-12 Cmos buffer circuit

Country Status (1)

Country Link
JP (1) JPS5612128A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5750133A (en) * 1980-09-09 1982-03-24 Citizen Watch Co Ltd Buffer circuit
JPS60130216A (en) * 1983-12-16 1985-07-11 Hitachi Ltd Buffer circuit
JPS60142620A (en) * 1983-12-28 1985-07-27 Matsushita Electric Ind Co Ltd Semiconductor integrated circuit
JPS60165117A (en) * 1984-02-08 1985-08-28 Nec Corp Cmos output circuit
JPS62166615A (en) * 1986-01-18 1987-07-23 Sanyo Electric Co Ltd Cmos buffer
US4825102A (en) * 1986-09-11 1989-04-25 Matsushita Electric Industrial Co., Ltd. MOS FET drive circuit providing protection against transient voltage breakdown
JPH0290724A (en) * 1988-09-27 1990-03-30 Nec Corp Mos output circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53149755A (en) * 1977-03-31 1978-12-27 Toshiba Corp Buffer circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53149755A (en) * 1977-03-31 1978-12-27 Toshiba Corp Buffer circuit

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5750133A (en) * 1980-09-09 1982-03-24 Citizen Watch Co Ltd Buffer circuit
JPH054855B2 (en) * 1980-09-09 1993-01-21 Citizen Watch Co Ltd
JPS60130216A (en) * 1983-12-16 1985-07-11 Hitachi Ltd Buffer circuit
JPS60142620A (en) * 1983-12-28 1985-07-27 Matsushita Electric Ind Co Ltd Semiconductor integrated circuit
JPS60165117A (en) * 1984-02-08 1985-08-28 Nec Corp Cmos output circuit
JPS62166615A (en) * 1986-01-18 1987-07-23 Sanyo Electric Co Ltd Cmos buffer
US4825102A (en) * 1986-09-11 1989-04-25 Matsushita Electric Industrial Co., Ltd. MOS FET drive circuit providing protection against transient voltage breakdown
JPH0290724A (en) * 1988-09-27 1990-03-30 Nec Corp Mos output circuit

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