JPS53149755A - Buffer circuit - Google Patents
Buffer circuitInfo
- Publication number
- JPS53149755A JPS53149755A JP3668977A JP3668977A JPS53149755A JP S53149755 A JPS53149755 A JP S53149755A JP 3668977 A JP3668977 A JP 3668977A JP 3668977 A JP3668977 A JP 3668977A JP S53149755 A JPS53149755 A JP S53149755A
- Authority
- JP
- Japan
- Prior art keywords
- buffer circuit
- signal
- obtaining
- signals
- driving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To reduce power consumption, by driving a switching element by obtaining two kind of signals which will not become significant levels when an input signal and its inversion signal used as the set signal and reset signal of a FF are equal in level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3668977A JPS53149755A (en) | 1977-03-31 | 1977-03-31 | Buffer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3668977A JPS53149755A (en) | 1977-03-31 | 1977-03-31 | Buffer circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53149755A true JPS53149755A (en) | 1978-12-27 |
Family
ID=12476780
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3668977A Pending JPS53149755A (en) | 1977-03-31 | 1977-03-31 | Buffer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53149755A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55100734A (en) * | 1979-01-26 | 1980-07-31 | Hitachi Ltd | Output buffer circuit with latch function |
JPS5612128A (en) * | 1979-07-12 | 1981-02-06 | Toshiba Corp | Cmos buffer circuit |
JPS5648722A (en) * | 1979-09-28 | 1981-05-02 | Nec Corp | Buffer circuit |
JPS5794795A (en) * | 1980-12-05 | 1982-06-12 | Suwa Seikosha Kk | Multiplex drive circuit for electronic wrist watch |
JPS59165522A (en) * | 1983-03-09 | 1984-09-18 | Toshiba Corp | Output buffer circuit |
JPS61112424A (en) * | 1984-11-06 | 1986-05-30 | Nec Corp | Output buffer circuit |
US4642609A (en) * | 1981-05-28 | 1987-02-10 | Fujitsu Limited | Integration type analog-to-digital converter having continuously charging and discharging functions |
JPS63314914A (en) * | 1987-06-18 | 1988-12-22 | Fujitsu Ltd | Semiconductor integrated circuit |
US5051610A (en) * | 1989-02-21 | 1991-09-24 | Mitsubishi Denki Kabushiki Kaisha | SR latch circuit |
JPH04292015A (en) * | 1990-12-21 | 1992-10-16 | Motorola Inc | Circuit for controlling high-output switching-transistor |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4825825A (en) * | 1971-08-12 | 1973-04-04 | ||
JPS49114337A (en) * | 1973-02-28 | 1974-10-31 | ||
JPS5037332A (en) * | 1973-08-06 | 1975-04-08 | ||
JPS50152633A (en) * | 1974-05-27 | 1975-12-08 |
-
1977
- 1977-03-31 JP JP3668977A patent/JPS53149755A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4825825A (en) * | 1971-08-12 | 1973-04-04 | ||
JPS49114337A (en) * | 1973-02-28 | 1974-10-31 | ||
JPS5037332A (en) * | 1973-08-06 | 1975-04-08 | ||
JPS50152633A (en) * | 1974-05-27 | 1975-12-08 |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55100734A (en) * | 1979-01-26 | 1980-07-31 | Hitachi Ltd | Output buffer circuit with latch function |
JPS5612128A (en) * | 1979-07-12 | 1981-02-06 | Toshiba Corp | Cmos buffer circuit |
JPS5648722A (en) * | 1979-09-28 | 1981-05-02 | Nec Corp | Buffer circuit |
JPS5794795A (en) * | 1980-12-05 | 1982-06-12 | Suwa Seikosha Kk | Multiplex drive circuit for electronic wrist watch |
US4642609A (en) * | 1981-05-28 | 1987-02-10 | Fujitsu Limited | Integration type analog-to-digital converter having continuously charging and discharging functions |
JPS59165522A (en) * | 1983-03-09 | 1984-09-18 | Toshiba Corp | Output buffer circuit |
JPS61112424A (en) * | 1984-11-06 | 1986-05-30 | Nec Corp | Output buffer circuit |
JPS63314914A (en) * | 1987-06-18 | 1988-12-22 | Fujitsu Ltd | Semiconductor integrated circuit |
US5051610A (en) * | 1989-02-21 | 1991-09-24 | Mitsubishi Denki Kabushiki Kaisha | SR latch circuit |
JPH04292015A (en) * | 1990-12-21 | 1992-10-16 | Motorola Inc | Circuit for controlling high-output switching-transistor |
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