JPS5662421A - Input circuit - Google Patents
Input circuitInfo
- Publication number
- JPS5662421A JPS5662421A JP13961579A JP13961579A JPS5662421A JP S5662421 A JPS5662421 A JP S5662421A JP 13961579 A JP13961579 A JP 13961579A JP 13961579 A JP13961579 A JP 13961579A JP S5662421 A JPS5662421 A JP S5662421A
- Authority
- JP
- Japan
- Prior art keywords
- input
- inverter
- low level
- channel mosfet
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/125—Discriminating pulses
- H03K5/1252—Suppression or limitation of noise or interference
Landscapes
- Logic Circuits (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To increase the antinoise characteristics, by providing a means which is controlled with clock pulse in open state of a switch and compulsively makes the input of an inverter. CONSTITUTION:With a switch 2 in off-state, the input of an inverter 3 is held at a low level, and the output terminal is kept at a high level. Further, this output is fed to the gate of an (n) channel MOSFET 5 to turn on it. Accordingly, the input of the inverter 3 is kept at a low level with more sure way. The 2nd (n) channel MOSFET 8 is connected in parallel with a resistance 4 and a n channel MOSFET 5, and clock pulses are input to the gate. Every time when clock pulses are raised to a high level, the 2nd (n) channel MOSFFT 8 is at on-state and the input of the inverter 3 is made to a low level, allowing to obtain the input circuit having high resistance to noise.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13961579A JPS5662421A (en) | 1979-10-29 | 1979-10-29 | Input circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13961579A JPS5662421A (en) | 1979-10-29 | 1979-10-29 | Input circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5662421A true JPS5662421A (en) | 1981-05-28 |
Family
ID=15249410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13961579A Pending JPS5662421A (en) | 1979-10-29 | 1979-10-29 | Input circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5662421A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57143923A (en) * | 1981-02-28 | 1982-09-06 | Seiko Instr & Electronics Ltd | Switch circuit |
JPS596621A (en) * | 1982-07-02 | 1984-01-13 | Citizen Watch Co Ltd | Input circuit of switch |
JPS59229926A (en) * | 1983-06-10 | 1984-12-24 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
JPH04229719A (en) * | 1990-11-06 | 1992-08-19 | Mitsubishi Electric Corp | Pull-up resistor control input circuit and output circuit |
-
1979
- 1979-10-29 JP JP13961579A patent/JPS5662421A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57143923A (en) * | 1981-02-28 | 1982-09-06 | Seiko Instr & Electronics Ltd | Switch circuit |
JPH033966B2 (en) * | 1981-02-28 | 1991-01-21 | Seiko Instr & Electronics | |
JPS596621A (en) * | 1982-07-02 | 1984-01-13 | Citizen Watch Co Ltd | Input circuit of switch |
JPS59229926A (en) * | 1983-06-10 | 1984-12-24 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
JPH04229719A (en) * | 1990-11-06 | 1992-08-19 | Mitsubishi Electric Corp | Pull-up resistor control input circuit and output circuit |
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