JPS55104135A - Semiconductor logic circuit - Google Patents
Semiconductor logic circuitInfo
- Publication number
- JPS55104135A JPS55104135A JP1171079A JP1171079A JPS55104135A JP S55104135 A JPS55104135 A JP S55104135A JP 1171079 A JP1171079 A JP 1171079A JP 1171079 A JP1171079 A JP 1171079A JP S55104135 A JPS55104135 A JP S55104135A
- Authority
- JP
- Japan
- Prior art keywords
- output
- logic circuit
- drain
- source
- semiconductor logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
Landscapes
- Logic Circuits (AREA)
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
Abstract
PURPOSE:To obtain the logic output by adding a few number of MOSFET's. CONSTITUTION:The NAND output of the N inputs A1-AN is obtained at the output XN. At the junctions of each drain and source of N MOSFETs Q1-QN, the source and the gate of load MOSFETs L1-LN-1 are connected. The power supply VCC is connected to the drain of the transistors L1-LN-1. With this constitution, the output corresponding to the logic outputs X1-XN-1 is obtained at the junction of each drain and source of N MOSFETs Q1-QN.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1171079A JPS55104135A (en) | 1979-02-03 | 1979-02-03 | Semiconductor logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1171079A JPS55104135A (en) | 1979-02-03 | 1979-02-03 | Semiconductor logic circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55104135A true JPS55104135A (en) | 1980-08-09 |
JPS6159012B2 JPS6159012B2 (en) | 1986-12-15 |
Family
ID=11785592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1171079A Granted JPS55104135A (en) | 1979-02-03 | 1979-02-03 | Semiconductor logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55104135A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4858168A (en) * | 1988-02-16 | 1989-08-15 | American Telephone And Telegraph Company | Carry look-ahead technique having a reduced number of logic levels |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5036145A (en) * | 1973-08-02 | 1975-04-05 |
-
1979
- 1979-02-03 JP JP1171079A patent/JPS55104135A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5036145A (en) * | 1973-08-02 | 1975-04-05 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4858168A (en) * | 1988-02-16 | 1989-08-15 | American Telephone And Telegraph Company | Carry look-ahead technique having a reduced number of logic levels |
Also Published As
Publication number | Publication date |
---|---|
JPS6159012B2 (en) | 1986-12-15 |
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