JPS5556732A - Complementary mos-type dynamic logic circuit system - Google Patents
Complementary mos-type dynamic logic circuit systemInfo
- Publication number
- JPS5556732A JPS5556732A JP12939078A JP12939078A JPS5556732A JP S5556732 A JPS5556732 A JP S5556732A JP 12939078 A JP12939078 A JP 12939078A JP 12939078 A JP12939078 A JP 12939078A JP S5556732 A JPS5556732 A JP S5556732A
- Authority
- JP
- Japan
- Prior art keywords
- channel
- circuit
- mos
- absolute value
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
- H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To realize the low power consumption as well as to accelerate the logic velocity by setting the absolute value of the gate driving voltage of plural number of MOS transistors in the P-type MOS circuit larger than the absolute value of the 1st power voltage and then securing the parallel connection to the 2nd power source of the negative polarity. CONSTITUTION:P-channel MOS circuit 13 of one circuit is selected from four circuits of each set based on the page selection data. At the same time, the complementary MOS-type dynamic NAND logic circuit is formed with N-channel MOS transistor Tr15, P-channel MOSTr17 and capacity 16 each. On the other hand, one decoder line is set at a high level with the other line set at low level each for address decoder 11. And one terminal of line 12 is connected to N-channel MOSTr18, and the other terminal is connected to P-channel MOSTr19 each. Here the absolute value of each source in Tr18 is set larger than that of the voltage of power source VDD1, and also each source is connected in parallel to power source VDD2 of the negative polarity. As a result, the power consumption can be reduced for the device, at the same time increasing the logic velocity.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12939078A JPS5556732A (en) | 1978-10-20 | 1978-10-20 | Complementary mos-type dynamic logic circuit system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12939078A JPS5556732A (en) | 1978-10-20 | 1978-10-20 | Complementary mos-type dynamic logic circuit system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5556732A true JPS5556732A (en) | 1980-04-25 |
Family
ID=15008387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12939078A Pending JPS5556732A (en) | 1978-10-20 | 1978-10-20 | Complementary mos-type dynamic logic circuit system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5556732A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4659948A (en) * | 1983-07-15 | 1987-04-21 | Northern Telecom Limited | Programmable logic array |
US9091221B2 (en) | 2009-06-17 | 2015-07-28 | Hitachi Construction Machinery Co., Ltd. | Engine speed control device for industrial vehicle |
-
1978
- 1978-10-20 JP JP12939078A patent/JPS5556732A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4659948A (en) * | 1983-07-15 | 1987-04-21 | Northern Telecom Limited | Programmable logic array |
US9091221B2 (en) | 2009-06-17 | 2015-07-28 | Hitachi Construction Machinery Co., Ltd. | Engine speed control device for industrial vehicle |
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