JPS6469116A - Delay circuit for semiconductor integrated circuit device - Google Patents

Delay circuit for semiconductor integrated circuit device

Info

Publication number
JPS6469116A
JPS6469116A JP62227607A JP22760787A JPS6469116A JP S6469116 A JPS6469116 A JP S6469116A JP 62227607 A JP62227607 A JP 62227607A JP 22760787 A JP22760787 A JP 22760787A JP S6469116 A JPS6469116 A JP S6469116A
Authority
JP
Japan
Prior art keywords
polysilicon resistor
semiconductor integrated
gate
delay
channel mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62227607A
Other languages
Japanese (ja)
Inventor
Toshimasa Usui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62227607A priority Critical patent/JPS6469116A/en
Publication of JPS6469116A publication Critical patent/JPS6469116A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Pulse Circuits (AREA)

Abstract

PURPOSE:To contrive the improvement of the accuracy of a delay time by connecting a polysilicon resistor having nearly the same width of a gate length in series with a MOS transistor(TR) of an inverter circuit so as to form a delay gate comprising a gate group. CONSTITUTION:Inverter circuits 7, 10 are the same inverter circuits as conventional circuits and a polysilicon resistor 11 of inverter circuits 8, 9 is connected between a power terminal 3 and a P-channel TR 5 and the polysilicon resistor 11 is connected between a GND terminal 4 and an N-channel MOS TR 6. Moreover, the polysilicon resistor 11 has nearly the same width as the gate length of the P-channel MOS TR 5 or the N-channel MOS TR 6 and the effect by the dispersion in the gate length is cancelled by the polysilicon resistor 11. Thus, the accuracy of the delay time is improved.
JP62227607A 1987-09-10 1987-09-10 Delay circuit for semiconductor integrated circuit device Pending JPS6469116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62227607A JPS6469116A (en) 1987-09-10 1987-09-10 Delay circuit for semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62227607A JPS6469116A (en) 1987-09-10 1987-09-10 Delay circuit for semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6469116A true JPS6469116A (en) 1989-03-15

Family

ID=16863594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62227607A Pending JPS6469116A (en) 1987-09-10 1987-09-10 Delay circuit for semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6469116A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5128574A (en) * 1989-04-11 1992-07-07 Canon Kabushiki Kaisha Brushless motor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5128574A (en) * 1989-04-11 1992-07-07 Canon Kabushiki Kaisha Brushless motor

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