JPS5373961A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5373961A
JPS5373961A JP15020476A JP15020476A JPS5373961A JP S5373961 A JPS5373961 A JP S5373961A JP 15020476 A JP15020476 A JP 15020476A JP 15020476 A JP15020476 A JP 15020476A JP S5373961 A JPS5373961 A JP S5373961A
Authority
JP
Japan
Prior art keywords
logic circuit
wiring
channels
contact hole
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15020476A
Other languages
Japanese (ja)
Other versions
JPS5711536B2 (en
Inventor
Hideo Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15020476A priority Critical patent/JPS5373961A/en
Priority to US05/859,872 priority patent/US4143390A/en
Publication of JPS5373961A publication Critical patent/JPS5373961A/en
Publication of JPS5711536B2 publication Critical patent/JPS5711536B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883Combination of depletion and enhancement field effect transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To make unnecessary the contact hole of wiring, by connecting the channels of MOS transistor between the first and second series circuits consisting of MOS transistors in series connection.
JP15020476A 1976-12-14 1976-12-14 Logic circuit Granted JPS5373961A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP15020476A JPS5373961A (en) 1976-12-14 1976-12-14 Logic circuit
US05/859,872 US4143390A (en) 1976-12-14 1977-12-12 Semiconductor device and a logical circuit formed of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15020476A JPS5373961A (en) 1976-12-14 1976-12-14 Logic circuit

Publications (2)

Publication Number Publication Date
JPS5373961A true JPS5373961A (en) 1978-06-30
JPS5711536B2 JPS5711536B2 (en) 1982-03-04

Family

ID=15491789

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15020476A Granted JPS5373961A (en) 1976-12-14 1976-12-14 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5373961A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4874130A (en) * 1971-12-23 1973-10-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4874130A (en) * 1971-12-23 1973-10-05

Also Published As

Publication number Publication date
JPS5711536B2 (en) 1982-03-04

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