JPS57113278A - Manufactue of eprom device - Google Patents

Manufactue of eprom device

Info

Publication number
JPS57113278A
JPS57113278A JP55189540A JP18954080A JPS57113278A JP S57113278 A JPS57113278 A JP S57113278A JP 55189540 A JP55189540 A JP 55189540A JP 18954080 A JP18954080 A JP 18954080A JP S57113278 A JPS57113278 A JP S57113278A
Authority
JP
Japan
Prior art keywords
section
insulation film
gate electrode
silicon
subsequently
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55189540A
Other languages
Japanese (ja)
Inventor
Izumi Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55189540A priority Critical patent/JPS57113278A/en
Publication of JPS57113278A publication Critical patent/JPS57113278A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To improve a high speed and a charge sustaining property and to form easily various transistors on an identical substrate by forming an insulation film having an optimum thickness in terms of withstand voltage and a high speed property, etc. in a memory cell and a peripheral circuit respectively. CONSTITUTION:A field insulation film 2 and gate insulation film 3 are in turn formed on a semiconductor substrate 1. A silicon gate electrode 4b is formed in a section B, an off-set silicon gate electrode 4d is formed on a section D and further a silicon floating gate electrode 4e is formed in a section E respectively. Separated insulation films 5b, 5d and 5e are formed respectively by providing an oxidation for the electrodes 4b, 4d and 4e. Subsequently, A section A is exposed to remove the film 3. An gate insulation film 7a is formed in the section A. And then silicon gate electrodes 8a, 8b and 8c are formed in the sections A, C and D respectively. Subsequently, sources 9aS, 9bS and 9cS and drains 9aD, 9bD and 9cD are formed respectively.
JP55189540A 1980-12-30 1980-12-30 Manufactue of eprom device Pending JPS57113278A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55189540A JPS57113278A (en) 1980-12-30 1980-12-30 Manufactue of eprom device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55189540A JPS57113278A (en) 1980-12-30 1980-12-30 Manufactue of eprom device

Publications (1)

Publication Number Publication Date
JPS57113278A true JPS57113278A (en) 1982-07-14

Family

ID=16243011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55189540A Pending JPS57113278A (en) 1980-12-30 1980-12-30 Manufactue of eprom device

Country Status (1)

Country Link
JP (1) JPS57113278A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2642901A1 (en) * 1989-01-17 1990-08-10 Sgs Thomson Microelectronics METHOD FOR SIMULTANEOUSLY MANUFACTURING MOS FLOATING GRID TRANSISTORS, HIGH VOLTAGE AND LOGIC
EP0443603A2 (en) * 1990-02-23 1991-08-28 Kabushiki Kaisha Toshiba Semiconductor device
US5320976A (en) * 1991-04-24 1994-06-14 Samsung Electronics Co., Ltd. Method for manufacturing VLSI semiconductor device
WO1999057750A3 (en) * 1998-05-04 2000-02-03 Koninkl Philips Electronics Nv Method of manufacturing a semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2642901A1 (en) * 1989-01-17 1990-08-10 Sgs Thomson Microelectronics METHOD FOR SIMULTANEOUSLY MANUFACTURING MOS FLOATING GRID TRANSISTORS, HIGH VOLTAGE AND LOGIC
EP0443603A2 (en) * 1990-02-23 1991-08-28 Kabushiki Kaisha Toshiba Semiconductor device
US5320976A (en) * 1991-04-24 1994-06-14 Samsung Electronics Co., Ltd. Method for manufacturing VLSI semiconductor device
WO1999057750A3 (en) * 1998-05-04 2000-02-03 Koninkl Philips Electronics Nv Method of manufacturing a semiconductor device

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