JPS57107059A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
JPS57107059A
JPS57107059A JP18473780A JP18473780A JPS57107059A JP S57107059 A JPS57107059 A JP S57107059A JP 18473780 A JP18473780 A JP 18473780A JP 18473780 A JP18473780 A JP 18473780A JP S57107059 A JPS57107059 A JP S57107059A
Authority
JP
Japan
Prior art keywords
conductor
grounding
power supply
conductors
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18473780A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6256664B2 (enrdf_load_stackoverflow
Inventor
Norikuni Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18473780A priority Critical patent/JPS57107059A/ja
Publication of JPS57107059A publication Critical patent/JPS57107059A/ja
Publication of JPS6256664B2 publication Critical patent/JPS6256664B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5221Crossover interconnections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP18473780A 1980-12-25 1980-12-25 Semiconductor package Granted JPS57107059A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18473780A JPS57107059A (en) 1980-12-25 1980-12-25 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18473780A JPS57107059A (en) 1980-12-25 1980-12-25 Semiconductor package

Publications (2)

Publication Number Publication Date
JPS57107059A true JPS57107059A (en) 1982-07-03
JPS6256664B2 JPS6256664B2 (enrdf_load_stackoverflow) 1987-11-26

Family

ID=16158474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18473780A Granted JPS57107059A (en) 1980-12-25 1980-12-25 Semiconductor package

Country Status (1)

Country Link
JP (1) JPS57107059A (enrdf_load_stackoverflow)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839038A (ja) * 1981-08-14 1983-03-07 アンプ・インコ−ポレ−テツド 半導体チツプ担持体
JPS596563A (ja) * 1982-07-05 1984-01-13 Nec Corp 集積回路装置
JPS6038841A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd 半導体装置
JPS60148148A (ja) * 1984-01-13 1985-08-05 Nec Corp 半導体装置
JPS6122358U (ja) * 1984-07-12 1986-02-08 株式会社東芝 ピングリツドアレイパツケ−ジ
JPH04133341A (ja) * 1990-09-25 1992-05-07 Matsushita Electric Works Ltd 半導体チップキャリア
US5225709A (en) * 1990-06-15 1993-07-06 Hitachi, Ltd. Package having a structure for stabilizing and/or impedance-matching a semiconductor IC device accommodated therein
JP2005244214A (ja) * 2004-02-24 2005-09-08 Samsung Electronics Co Ltd 静電気放電防止のための半導体素子及び方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5185349A (enrdf_load_stackoverflow) * 1975-01-24 1976-07-26 Hitachi Ltd
JPS5272169A (en) * 1975-12-12 1977-06-16 Nec Corp Semiconductor device
JPS5415663A (en) * 1974-01-10 1979-02-05 Nec Corp Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5415663A (en) * 1974-01-10 1979-02-05 Nec Corp Semiconductor device
JPS5185349A (enrdf_load_stackoverflow) * 1975-01-24 1976-07-26 Hitachi Ltd
JPS5272169A (en) * 1975-12-12 1977-06-16 Nec Corp Semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839038A (ja) * 1981-08-14 1983-03-07 アンプ・インコ−ポレ−テツド 半導体チツプ担持体
JPS596563A (ja) * 1982-07-05 1984-01-13 Nec Corp 集積回路装置
JPS6038841A (ja) * 1983-08-12 1985-02-28 Hitachi Ltd 半導体装置
JPS60148148A (ja) * 1984-01-13 1985-08-05 Nec Corp 半導体装置
JPS6122358U (ja) * 1984-07-12 1986-02-08 株式会社東芝 ピングリツドアレイパツケ−ジ
US5225709A (en) * 1990-06-15 1993-07-06 Hitachi, Ltd. Package having a structure for stabilizing and/or impedance-matching a semiconductor IC device accommodated therein
JPH04133341A (ja) * 1990-09-25 1992-05-07 Matsushita Electric Works Ltd 半導体チップキャリア
JP2005244214A (ja) * 2004-02-24 2005-09-08 Samsung Electronics Co Ltd 静電気放電防止のための半導体素子及び方法

Also Published As

Publication number Publication date
JPS6256664B2 (enrdf_load_stackoverflow) 1987-11-26

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