JPS5693319A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5693319A
JPS5693319A JP16915879A JP16915879A JPS5693319A JP S5693319 A JPS5693319 A JP S5693319A JP 16915879 A JP16915879 A JP 16915879A JP 16915879 A JP16915879 A JP 16915879A JP S5693319 A JPS5693319 A JP S5693319A
Authority
JP
Japan
Prior art keywords
film
resist
substrate
evaporated
electrode material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16915879A
Other languages
Japanese (ja)
Other versions
JPH0117249B2 (en
Inventor
Kazuya Watari
Kenji Sugishima
Satoshi Suda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16915879A priority Critical patent/JPS5693319A/en
Publication of JPS5693319A publication Critical patent/JPS5693319A/en
Publication of JPH0117249B2 publication Critical patent/JPH0117249B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To prevent the generation of the bad coverage of the electrode and the like of the subject device by a method wherein an incineration treatment is performed on a resist using a plasma asher in the etching process following the resist pattern. CONSTITUTION:A negative type or a positive type resist film 15 is formed on a substrate 14 such as an SiO2. Then, following the resist pattern, an etching for the substrate 14 is started and it is discontinued in the middle. Then the film 15 is incinerated using the plasma asher (the dotted line section is removed). Next, after removing the remainder of film 15, an electrode material 16 is evaporated. As a result, the pattern-edge section of the film 14 is processed into a tapered shape, thereby enabling to obtain an excellent evaporated film of the coverage on the electrode material 16.
JP16915879A 1979-12-27 1979-12-27 Manufacture of semiconductor device Granted JPS5693319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16915879A JPS5693319A (en) 1979-12-27 1979-12-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16915879A JPS5693319A (en) 1979-12-27 1979-12-27 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5693319A true JPS5693319A (en) 1981-07-28
JPH0117249B2 JPH0117249B2 (en) 1989-03-29

Family

ID=15881349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16915879A Granted JPS5693319A (en) 1979-12-27 1979-12-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5693319A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63124527A (en) * 1986-11-14 1988-05-28 Nec Corp Manufacture of semiconductor device
US5316616A (en) * 1988-02-09 1994-05-31 Fujitsu Limited Dry etching with hydrogen bromide or bromine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54105476A (en) * 1978-02-06 1979-08-18 Sony Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54105476A (en) * 1978-02-06 1979-08-18 Sony Corp Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63124527A (en) * 1986-11-14 1988-05-28 Nec Corp Manufacture of semiconductor device
US5316616A (en) * 1988-02-09 1994-05-31 Fujitsu Limited Dry etching with hydrogen bromide or bromine

Also Published As

Publication number Publication date
JPH0117249B2 (en) 1989-03-29

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