JPS5683900A - Buffer recording device - Google Patents

Buffer recording device

Info

Publication number
JPS5683900A
JPS5683900A JP16204879A JP16204879A JPS5683900A JP S5683900 A JPS5683900 A JP S5683900A JP 16204879 A JP16204879 A JP 16204879A JP 16204879 A JP16204879 A JP 16204879A JP S5683900 A JPS5683900 A JP S5683900A
Authority
JP
Japan
Prior art keywords
error
data
area
address
fixed fault
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16204879A
Other languages
Japanese (ja)
Inventor
Mitsunobu Sugimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16204879A priority Critical patent/JPS5683900A/en
Publication of JPS5683900A publication Critical patent/JPS5683900A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To shorten the processing for error occurrence and prevent reduction of the data area other than a fixed fault area, by reading directly and rewriting the data from a main memory device for the erroneous detection of a read data and by processing the fixed fault on a basis of number of the error detection.
CONSTITUTION: When the error of data read from buffer cell 7 is detected by detecting circuit 9, the address is registered in error address register 100, and main memory device 12 is accessed through request generating circuit 103 to write data to cell 7 again, and simultaneously, read data from device 12 is supplied to CPU11 through selecting circuit 10, thus performing the processing for error occurrence rapidly. Meanwhile, error address counter 101 is counted up each time the error address is registered in register 100; and when the error detection frequency becomes a prescribed value or more, a fixed fault is reported to CPU11 through comparing circuit 102, and the address area of array 7 is sealed to prevent reduction of the data area other than the fixed fault area.
COPYRIGHT: (C)1981,JPO&Japio
JP16204879A 1979-12-13 1979-12-13 Buffer recording device Pending JPS5683900A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16204879A JPS5683900A (en) 1979-12-13 1979-12-13 Buffer recording device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16204879A JPS5683900A (en) 1979-12-13 1979-12-13 Buffer recording device

Publications (1)

Publication Number Publication Date
JPS5683900A true JPS5683900A (en) 1981-07-08

Family

ID=15747095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16204879A Pending JPS5683900A (en) 1979-12-13 1979-12-13 Buffer recording device

Country Status (1)

Country Link
JP (1) JPS5683900A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111887U (en) * 1982-01-26 1983-07-30 平野　道仁 refrigerator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58111887U (en) * 1982-01-26 1983-07-30 平野　道仁 refrigerator

Similar Documents

Publication Publication Date Title
JPS5694593A (en) Storage device
JPS5539994A (en) Multiprocessor system
JPS5683900A (en) Buffer recording device
JPS55163697A (en) Memory device
JPS5694598A (en) Memory error correction control system
JPS5320823A (en) Memory unit test system
JPS5721000A (en) Memory measuring device
JPS5593596A (en) Memory unit
JPS5496331A (en) Information processor
JPS5617442A (en) Parity error processing system
JPS5587396A (en) Memory test system
JPS5677985A (en) Semiconductor memory device
JPS5619597A (en) Diagnostic and processing system for memory unit
JPS554757A (en) Error control system of memory unit
JPS5542354A (en) Diagnostic system for memory unit
JPS5736500A (en) Memory check system
JPS5634194A (en) Memory unit
JPS59129994A (en) Check system of control program of computer
JPS57130282A (en) Access control circuit for magnetic bubble memory
JPS5489435A (en) Common memory device control system
JPS5673358A (en) Testing device for memory
JPS5587395A (en) Detection system for memory device fault
JPS54101626A (en) Anomaly detection circuit for memory device
JPS5563420A (en) Detector for data train
JPS5557962A (en) Error detection system