JPS5489435A - Common memory device control system - Google Patents
Common memory device control systemInfo
- Publication number
- JPS5489435A JPS5489435A JP15831277A JP15831277A JPS5489435A JP S5489435 A JPS5489435 A JP S5489435A JP 15831277 A JP15831277 A JP 15831277A JP 15831277 A JP15831277 A JP 15831277A JP S5489435 A JPS5489435 A JP S5489435A
- Authority
- JP
- Japan
- Prior art keywords
- words
- write
- bit
- error
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To prevent the faulty of one CPU from obstructing processings of other CPUs by adding an error detecting code to the whole of words when information is written in one common memory from a number of CPUs and reading information together with this code.
CONSTITUTION: When write information to common memory CM from CPU0 to CPUn consists of a number of words, the word which is composed of a redundant bit to detect error for the whole of words is added. At a write time, accumulator ACC indicates an address of device CM, the number of written words and write data to write device W through memory address designation device ADR. The word for error detection is obtained by operating addition of every bit of the whole of words which construct information in write device W. The read operation has access to device CM through read device R, and adding every bit of words of read data and storing it to a register. At a correct read time, contents of the register are all 0. Otherwise, one bit is 1 at least and the error report is sent to ACC through error reporting device ER, thus taking an appropriate action.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15831277A JPS5489435A (en) | 1977-12-27 | 1977-12-27 | Common memory device control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15831277A JPS5489435A (en) | 1977-12-27 | 1977-12-27 | Common memory device control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5489435A true JPS5489435A (en) | 1979-07-16 |
Family
ID=15668871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15831277A Pending JPS5489435A (en) | 1977-12-27 | 1977-12-27 | Common memory device control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5489435A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0362146A (en) * | 1989-07-31 | 1991-03-18 | Toshiba Corp | Data protection device to be used in computer system |
-
1977
- 1977-12-27 JP JP15831277A patent/JPS5489435A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0362146A (en) * | 1989-07-31 | 1991-03-18 | Toshiba Corp | Data protection device to be used in computer system |
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