JPS5496331A - Information processor - Google Patents

Information processor

Info

Publication number
JPS5496331A
JPS5496331A JP280378A JP280378A JPS5496331A JP S5496331 A JPS5496331 A JP S5496331A JP 280378 A JP280378 A JP 280378A JP 280378 A JP280378 A JP 280378A JP S5496331 A JPS5496331 A JP S5496331A
Authority
JP
Japan
Prior art keywords
row
counter
output
error
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP280378A
Other languages
Japanese (ja)
Other versions
JPS609300B2 (en
Inventor
Minoru Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53002803A priority Critical patent/JPS609300B2/en
Publication of JPS5496331A publication Critical patent/JPS5496331A/en
Publication of JPS609300B2 publication Critical patent/JPS609300B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To prevent reduction of the buffer memory capacity caused by the intermittent fault and to prolong the memory capacity in terms of time with the fixed fault by inhibiting the use of the corresponding row when the frequency of the reading error reaches the prescribed value.
CONSTITUTION: Buffer memory unit 12's reading output of the informaton processor sets counter 10 corresponding to the row when the data corresponding to the row coincided at coincidence detector circuit 7 and the error is detected (9). At the same time, the reading output of buffer address array 11 sets counter 10 against the row when it is tested and the error is detected (8). Counter 10, when reaching the prescribed count value, sends its output to writing row selector circuit 5, and then circuit 5 closes the front-step gate 6 of array 11 and unit 12 each to give forced inhibition of use to the row which received the counter output.
COPYRIGHT: (C)1979,JPO&Japio
JP53002803A 1978-01-17 1978-01-17 information processing equipment Expired JPS609300B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53002803A JPS609300B2 (en) 1978-01-17 1978-01-17 information processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53002803A JPS609300B2 (en) 1978-01-17 1978-01-17 information processing equipment

Publications (2)

Publication Number Publication Date
JPS5496331A true JPS5496331A (en) 1979-07-30
JPS609300B2 JPS609300B2 (en) 1985-03-09

Family

ID=11539527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53002803A Expired JPS609300B2 (en) 1978-01-17 1978-01-17 information processing equipment

Country Status (1)

Country Link
JP (1) JPS609300B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59207098A (en) * 1983-05-10 1984-11-24 Nec Corp Information processor
WO2007097027A1 (en) 2006-02-27 2007-08-30 Fujitsu Limited Degeneration controller and degeneration control program

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59207098A (en) * 1983-05-10 1984-11-24 Nec Corp Information processor
WO2007097027A1 (en) 2006-02-27 2007-08-30 Fujitsu Limited Degeneration controller and degeneration control program
EP1990728A1 (en) * 2006-02-27 2008-11-12 Fujitsu Ltd. Degeneration controller and degeneration control program
EP1990728A4 (en) * 2006-02-27 2009-08-05 Fujitsu Ltd Degeneration controller and degeneration control program
US8006139B2 (en) 2006-02-27 2011-08-23 Fujitsu Limited Degeneration control device and degeneration control program

Also Published As

Publication number Publication date
JPS609300B2 (en) 1985-03-09

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