JPS5542354A - Diagnostic system for memory unit - Google Patents

Diagnostic system for memory unit

Info

Publication number
JPS5542354A
JPS5542354A JP11564578A JP11564578A JPS5542354A JP S5542354 A JPS5542354 A JP S5542354A JP 11564578 A JP11564578 A JP 11564578A JP 11564578 A JP11564578 A JP 11564578A JP S5542354 A JPS5542354 A JP S5542354A
Authority
JP
Japan
Prior art keywords
write
write data
registers
data
memory unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11564578A
Other languages
Japanese (ja)
Inventor
Osamu Araya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11564578A priority Critical patent/JPS5542354A/en
Publication of JPS5542354A publication Critical patent/JPS5542354A/en
Pending legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To detect definitely the malfunction of an address system by sequentially storing assigned addresses and write data in several address registers and write data registers.
CONSTITUTION: Write operation is repeated n times to write write data WD1WWDn in memory regions of a memory unit assigned by addresses A1WAn and at the point in time when the operation ends, addresses A1WAn are stored in address registers AR1-nWAR1-1 while write data WD1WWDn are stored in write registers WDR2-nWWDR2-1. Next, data are read out in sequence from the memory unit on the basis of the contents of AR1-nWAR1-1 and comparator 7 makes comparisons between read data and write data and sends an error signal in case of a dissidence. Consequently, malfunction of the address system can accurately be detected without fail.
COPYRIGHT: (C)1980,JPO&Japio
JP11564578A 1978-09-20 1978-09-20 Diagnostic system for memory unit Pending JPS5542354A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11564578A JPS5542354A (en) 1978-09-20 1978-09-20 Diagnostic system for memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11564578A JPS5542354A (en) 1978-09-20 1978-09-20 Diagnostic system for memory unit

Publications (1)

Publication Number Publication Date
JPS5542354A true JPS5542354A (en) 1980-03-25

Family

ID=14667763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11564578A Pending JPS5542354A (en) 1978-09-20 1978-09-20 Diagnostic system for memory unit

Country Status (1)

Country Link
JP (1) JPS5542354A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5826400A (en) * 1981-08-07 1983-02-16 Nec Corp Storage element with storage check function
JPS5853094A (en) * 1981-09-24 1983-03-29 Fujitsu Ltd Test method for storage device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5826400A (en) * 1981-08-07 1983-02-16 Nec Corp Storage element with storage check function
JPS5853094A (en) * 1981-09-24 1983-03-29 Fujitsu Ltd Test method for storage device

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