JPS5671976A - Preparation method of mos type semiconductor system - Google Patents
Preparation method of mos type semiconductor systemInfo
- Publication number
- JPS5671976A JPS5671976A JP14980079A JP14980079A JPS5671976A JP S5671976 A JPS5671976 A JP S5671976A JP 14980079 A JP14980079 A JP 14980079A JP 14980079 A JP14980079 A JP 14980079A JP S5671976 A JPS5671976 A JP S5671976A
- Authority
- JP
- Japan
- Prior art keywords
- small
- wiring
- gate
- preparation
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002360 preparation method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 229910052759 nickel Inorganic materials 0.000 abstract 2
- 229910052763 palladium Inorganic materials 0.000 abstract 2
- 229910052697 platinum Inorganic materials 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229910021332 silicide Inorganic materials 0.000 abstract 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 208000019901 Anxiety disease Diseases 0.000 abstract 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 230000036506 anxiety Effects 0.000 abstract 1
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 abstract 1
- 238000005245 sintering Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To obtain a Si gate MOSIC having a small resistance and a small step difference by a method wherein after a poly Si film is selectively oxidized, a silicide of Ni, Pd or Pt is formed and an unreacted metallic film is etched from an oxide film. CONSTITUTION:As in the existing process, a Si gate MOSIC is formed and a poly Si 6 is laminated on the whole surface. A gate wiring part and a connection part with a Si substrate are masked with Si3N4 7. The whole surface except a wiring part 8 and a connection part 9 is oxidized into SiO2. Next thereto, coating is performed with Pt, Pd and Ni, etc. and a sintering is performed to form silicide 10, 11 and unreacted metal on SiO2 is removed by etching. With this constitution, since a wiring resistance is small and step differences are small, there is no anxiety that a disconnection occurs in a wiring of the 2nd layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14980079A JPS5671976A (en) | 1979-11-19 | 1979-11-19 | Preparation method of mos type semiconductor system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14980079A JPS5671976A (en) | 1979-11-19 | 1979-11-19 | Preparation method of mos type semiconductor system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5671976A true JPS5671976A (en) | 1981-06-15 |
Family
ID=15482983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14980079A Pending JPS5671976A (en) | 1979-11-19 | 1979-11-19 | Preparation method of mos type semiconductor system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5671976A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6052044A (en) * | 1983-05-06 | 1985-03-23 | テキサス インスツルメンツ インコ−ポレイテツド | Method of forming metal silicide |
| JPS62166568A (en) * | 1986-01-20 | 1987-07-23 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and manufacture thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5236477A (en) * | 1975-09-17 | 1977-03-19 | Philips Nv | Method of producing semiconductor device |
| JPS53139474A (en) * | 1977-05-11 | 1978-12-05 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
-
1979
- 1979-11-19 JP JP14980079A patent/JPS5671976A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5236477A (en) * | 1975-09-17 | 1977-03-19 | Philips Nv | Method of producing semiconductor device |
| JPS53139474A (en) * | 1977-05-11 | 1978-12-05 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6052044A (en) * | 1983-05-06 | 1985-03-23 | テキサス インスツルメンツ インコ−ポレイテツド | Method of forming metal silicide |
| JPH0365658B2 (en) * | 1983-05-06 | 1991-10-14 | ||
| JPS62166568A (en) * | 1986-01-20 | 1987-07-23 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and manufacture thereof |
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