JPS564235A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS564235A
JPS564235A JP8034379A JP8034379A JPS564235A JP S564235 A JPS564235 A JP S564235A JP 8034379 A JP8034379 A JP 8034379A JP 8034379 A JP8034379 A JP 8034379A JP S564235 A JPS564235 A JP S564235A
Authority
JP
Japan
Prior art keywords
film
thin
layer
mask
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8034379A
Other languages
Japanese (ja)
Inventor
Masao Obara
Yoshiaki Komatsubara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8034379A priority Critical patent/JPS564235A/en
Publication of JPS564235A publication Critical patent/JPS564235A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To make an accurate wiring pattern with no short circuit between lines, by providing a film of W or the like of good adhering property on a semiconductor unit, overlapping a resist film and a Pt film or the like with the former film, using a lift-off method to make a fine pattern and electroplating Au.
CONSTITUTION: An opening is made through an SiO2 film 102 on an Si substrate 101 whereon a diffused layer for manufacturing a semiconductor unit is already produced. A PtSi layer 104 is made for a low-resistance ohmic connection and coated with a thin Ti film 106. A resist mask 107 is provided thereon. The thin SiO2 film is removed from the surface of the Ti film which is exposed by short-time sputter etching. Thin Pt films 1081, 1082 are separately coated. The mask 107 is dissolved off so that the Pt film 1082 is lifted off together with the resist. O2 plasma treatment is effected to produce an insulating oxide layer 109 on the exposed Ti film 106. Required opening is performed. The Ti film 106 is used as a cathode to produce a thin Au film 110 on the Pt film 1081 by electroplating. The Au mask 110 is used to etch the insulating layer 109 and the Ti film 106. Annealing is effected to complete a wiring 111. According to this method, the accurate three-layer wiring with no short circuit and no thinning can be manufactured.
COPYRIGHT: (C)1981,JPO&Japio
JP8034379A 1979-06-26 1979-06-26 Manufacture of semiconductor device Pending JPS564235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8034379A JPS564235A (en) 1979-06-26 1979-06-26 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8034379A JPS564235A (en) 1979-06-26 1979-06-26 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS564235A true JPS564235A (en) 1981-01-17

Family

ID=13715605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8034379A Pending JPS564235A (en) 1979-06-26 1979-06-26 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS564235A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06224152A (en) * 1993-01-27 1994-08-12 Nec Corp Semiconductor device and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06224152A (en) * 1993-01-27 1994-08-12 Nec Corp Semiconductor device and manufacture thereof

Similar Documents

Publication Publication Date Title
JPS55163860A (en) Manufacture of semiconductor device
JPS52120782A (en) Manufacture of semiconductor device
JPS564235A (en) Manufacture of semiconductor device
JPS57145340A (en) Manufacture of semiconductor device
JPS55165636A (en) Manufacture of semiconductor device
JPS5660030A (en) Manufacture of semiconductor device
JPS5478659A (en) Menufacture of semiconductor device
JPS564234A (en) Manufacture of semiconductor device
JPS57155772A (en) Manufacture of semiconductor device
JPS5797629A (en) Manufacture of semiconductor device
JPS5660033A (en) Manufacture of semiconductor device
JPS5681955A (en) Manufacture of semiconductor integrated circuit
JPS5527659A (en) Method of manufacturing semiconductor device
JPS54126485A (en) Forming method of insulating film for multilayer wiring
JPS5671976A (en) Preparation method of mos type semiconductor system
JPS5478668A (en) Manufacture of semiconductor device
JPH023926A (en) Forming method of wiring
JPS5768035A (en) Manufacture of semiconductor device
JPS5723224A (en) Manufacture of semiconductor integrated circuit
JPS63281443A (en) Manufacture of semiconductor device
JPS55110070A (en) Manufacture of semiconductor integrated circuit device
JPS5518041A (en) Method of fabricating semiconductor device
JPS6489322A (en) Manufacture of semiconductor device
JPS5493971A (en) Production of semiconductor device
JPS5474384A (en) Manufacture of semiconductor device