JPS5665400A - Memory write tracing device - Google Patents

Memory write tracing device

Info

Publication number
JPS5665400A
JPS5665400A JP14105479A JP14105479A JPS5665400A JP S5665400 A JPS5665400 A JP S5665400A JP 14105479 A JP14105479 A JP 14105479A JP 14105479 A JP14105479 A JP 14105479A JP S5665400 A JPS5665400 A JP S5665400A
Authority
JP
Japan
Prior art keywords
address
memory
instruction
circuit
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14105479A
Other languages
Japanese (ja)
Inventor
Shiro Shikaide
Mitsutoshi Ejiri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14105479A priority Critical patent/JPS5665400A/en
Publication of JPS5665400A publication Critical patent/JPS5665400A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to investigate the address of an instruction word that has destroyed a memory in the generation of a runaway, by reading the memory contents of an instruction address memory part by supervising instruction execution.
CONSTITUTION: The address when CPV access the main memory unit is receoved by receiving circuit 31 of memory write tracing device 3 at the same time and when instruction fetch deciding circuit 32 decides the write address, the address is stored in address memory part 37 through instruction address register 33 and instruction address memory circuit 36 according to the writing to the main memory unit. Smilarly, the address in readout access is stored in memory part 37 by way of data address memory circuit 34, data generation deciding circuit 35, circuit 36, etc., and the instruction execution is supervised. This constitution, the address of an instruction causing memory destruction can be inverstigated easily by the address of memory part 37 in program runaway detection caused by the memory destruction due to a program miss.
COPYRIGHT: (C)1981,JPO&Japio
JP14105479A 1979-10-31 1979-10-31 Memory write tracing device Pending JPS5665400A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14105479A JPS5665400A (en) 1979-10-31 1979-10-31 Memory write tracing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14105479A JPS5665400A (en) 1979-10-31 1979-10-31 Memory write tracing device

Publications (1)

Publication Number Publication Date
JPS5665400A true JPS5665400A (en) 1981-06-03

Family

ID=15283173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14105479A Pending JPS5665400A (en) 1979-10-31 1979-10-31 Memory write tracing device

Country Status (1)

Country Link
JP (1) JPS5665400A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03252746A (en) * 1990-03-02 1991-11-12 Nippon Telegr & Teleph Corp <Ntt> Memory access history preserving system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03252746A (en) * 1990-03-02 1991-11-12 Nippon Telegr & Teleph Corp <Ntt> Memory access history preserving system

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