JPS5651088A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5651088A JPS5651088A JP12495679A JP12495679A JPS5651088A JP S5651088 A JPS5651088 A JP S5651088A JP 12495679 A JP12495679 A JP 12495679A JP 12495679 A JP12495679 A JP 12495679A JP S5651088 A JPS5651088 A JP S5651088A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- current
- fetq1
- source
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To reduce the current consumption and occupied area, by using a transfer gate MOSFET of different conduction type as driving MOSFET, for a given area at the same time. CONSTITUTION:Ion injection is being made so that the threshold voltage value specified is given to transfer gate P type MOSFETQ1, Q2 and driving N type MOSFETQ3, Q4. Thus, when a voltage between the gate and the source is zero, the current between the drain and the source is greater for FETQ1, Q2 than FETQ3, Q4, and the increment of the gate voltage required to change one digit of the current between the drain and the source at the gate voltage less than the threshold value is greater for FETQ1, Q2 than FETQ3, Q4. Further, FETQ1, Q2 are operated at the gate current region at threshold value or less for load at the same time. Accordingly, the current consumption is lowered for the memory unit in comparison with use of a high resistance and the occupied area is decreased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12495679A JPS5651088A (en) | 1979-09-28 | 1979-09-28 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12495679A JPS5651088A (en) | 1979-09-28 | 1979-09-28 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5651088A true JPS5651088A (en) | 1981-05-08 |
Family
ID=14898370
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12495679A Pending JPS5651088A (en) | 1979-09-28 | 1979-09-28 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5651088A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0113867A2 (en) * | 1982-12-20 | 1984-07-25 | General Electric Company | Cross-coupled transistor memory cell for MOS random access memory of reduced power dissipation |
US4653025A (en) * | 1983-12-23 | 1987-03-24 | Hitachi, Ltd. | Random access memory with high density and low power |
US6654273B2 (en) | 2000-09-29 | 2003-11-25 | Nec Electronics Corporation | Shadow ram cell using a ferroelectric capacitor |
US6674105B2 (en) | 1998-10-16 | 2004-01-06 | Nec Corporation | Semiconductor memory device and method of forming the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5368991A (en) * | 1976-12-02 | 1978-06-19 | Fujitsu Ltd | 4-transistor static memory cell |
-
1979
- 1979-09-28 JP JP12495679A patent/JPS5651088A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5368991A (en) * | 1976-12-02 | 1978-06-19 | Fujitsu Ltd | 4-transistor static memory cell |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0113867A2 (en) * | 1982-12-20 | 1984-07-25 | General Electric Company | Cross-coupled transistor memory cell for MOS random access memory of reduced power dissipation |
US4653025A (en) * | 1983-12-23 | 1987-03-24 | Hitachi, Ltd. | Random access memory with high density and low power |
US6674105B2 (en) | 1998-10-16 | 2004-01-06 | Nec Corporation | Semiconductor memory device and method of forming the same |
US6654273B2 (en) | 2000-09-29 | 2003-11-25 | Nec Electronics Corporation | Shadow ram cell using a ferroelectric capacitor |
US6731530B2 (en) | 2000-09-29 | 2004-05-04 | Nec Corporation | Shadow RAM cell using a ferroelectric capacitor |
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