JPS5558575A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5558575A
JPS5558575A JP13180578A JP13180578A JPS5558575A JP S5558575 A JPS5558575 A JP S5558575A JP 13180578 A JP13180578 A JP 13180578A JP 13180578 A JP13180578 A JP 13180578A JP S5558575 A JPS5558575 A JP S5558575A
Authority
JP
Japan
Prior art keywords
transistor
type
enhancement type
parallel
depletion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13180578A
Other languages
Japanese (ja)
Inventor
Tetsuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13180578A priority Critical patent/JPS5558575A/en
Publication of JPS5558575A publication Critical patent/JPS5558575A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883Combination of depletion and enhancement field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To obtain a device in which high resistor and a transistor are connected in parallel by forming a part of MISFET channel as a depletion type and the other part as an enhancement type. CONSTITUTION:Ions are implanted in a channel area with use of a resistmask and a part of an enhancement type is changed into an active dpletion type. This leads to a device in which an enhancement type FET is connected with the high resistance in parallel, as a whole. When this device is used in both the load side of an inverter circuit and a transistor T2, the leakage from an operating transistor T1 is compensated by a current in the depletion channel area of the transistor T2 so that output at OUT is able to be maintained at ''H'' level for a long period. Thus in the case of constituting a memory circuit, a refresh interval can be made wider.
JP13180578A 1978-10-26 1978-10-26 Semiconductor device Pending JPS5558575A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13180578A JPS5558575A (en) 1978-10-26 1978-10-26 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13180578A JPS5558575A (en) 1978-10-26 1978-10-26 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5558575A true JPS5558575A (en) 1980-05-01

Family

ID=15066512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13180578A Pending JPS5558575A (en) 1978-10-26 1978-10-26 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5558575A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58190068A (en) * 1982-04-29 1983-11-05 Mitsubishi Electric Corp Semiconductor nonvolatile memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239354A (en) * 1975-09-23 1977-03-26 Toshiba Corp Drive circuit
JPS52115668A (en) * 1976-03-25 1977-09-28 Sony Corp Field effect transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239354A (en) * 1975-09-23 1977-03-26 Toshiba Corp Drive circuit
JPS52115668A (en) * 1976-03-25 1977-09-28 Sony Corp Field effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58190068A (en) * 1982-04-29 1983-11-05 Mitsubishi Electric Corp Semiconductor nonvolatile memory device

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