JPS5650539A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5650539A
JPS5650539A JP12711379A JP12711379A JPS5650539A JP S5650539 A JPS5650539 A JP S5650539A JP 12711379 A JP12711379 A JP 12711379A JP 12711379 A JP12711379 A JP 12711379A JP S5650539 A JPS5650539 A JP S5650539A
Authority
JP
Japan
Prior art keywords
bonding
bump
pad
wiring
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12711379A
Other languages
Japanese (ja)
Inventor
Shigeki Iguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP12711379A priority Critical patent/JPS5650539A/en
Publication of JPS5650539A publication Critical patent/JPS5650539A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To form a bump at a low temperature by using conductive polyimides resin as a bumping material for a semiconductor element and using the printing technology. CONSTITUTION:An Al pad 3 is formed on a silicon wafer 1. On said pad 3, is printed a heat sealing agent 7 comprising polyimides resin which is provided with a conductive electrode by mixing a conductive particles. In the case a standoff 12 is formed, it is formed at the same time as the bump 11, by likewise printing the heat sealing agent. Since there is no restriction on a wiring material in the bonding substrate wiring, this method can be applied in various wiring substrates. Since the bonding temperature at the bonding to the substrate is low 150 deg., the generation of thermal distortion and cracks can be prevented.
JP12711379A 1979-09-29 1979-09-29 Semiconductor device Pending JPS5650539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12711379A JPS5650539A (en) 1979-09-29 1979-09-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12711379A JPS5650539A (en) 1979-09-29 1979-09-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5650539A true JPS5650539A (en) 1981-05-07

Family

ID=14951922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12711379A Pending JPS5650539A (en) 1979-09-29 1979-09-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5650539A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60116150A (en) * 1983-11-29 1985-06-22 Matsushita Electric Ind Co Ltd Semiconductor device
JPS61242041A (en) * 1985-04-19 1986-10-28 Citizen Watch Co Ltd Semiconductor device
US5700715A (en) * 1994-06-14 1997-12-23 Lsi Logic Corporation Process for mounting a semiconductor device to a circuit substrate
JP2003088932A (en) * 2001-09-18 2003-03-25 Taneisya Co Ltd Rotary plastic worked body, rotary plastic working method and its apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51102466A (en) * 1975-03-06 1976-09-09 Suwa Seikosha Kk HANDOTAISOSHINOJITSUSOHOHO
JPS51144577A (en) * 1975-06-06 1976-12-11 Seiko Epson Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51102466A (en) * 1975-03-06 1976-09-09 Suwa Seikosha Kk HANDOTAISOSHINOJITSUSOHOHO
JPS51144577A (en) * 1975-06-06 1976-12-11 Seiko Epson Corp Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60116150A (en) * 1983-11-29 1985-06-22 Matsushita Electric Ind Co Ltd Semiconductor device
JPH0334651B2 (en) * 1983-11-29 1991-05-23 Matsushita Electric Ind Co Ltd
JPS61242041A (en) * 1985-04-19 1986-10-28 Citizen Watch Co Ltd Semiconductor device
US5700715A (en) * 1994-06-14 1997-12-23 Lsi Logic Corporation Process for mounting a semiconductor device to a circuit substrate
JP2003088932A (en) * 2001-09-18 2003-03-25 Taneisya Co Ltd Rotary plastic worked body, rotary plastic working method and its apparatus

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