JPS5645051A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5645051A
JPS5645051A JP12121379A JP12121379A JPS5645051A JP S5645051 A JPS5645051 A JP S5645051A JP 12121379 A JP12121379 A JP 12121379A JP 12121379 A JP12121379 A JP 12121379A JP S5645051 A JPS5645051 A JP S5645051A
Authority
JP
Japan
Prior art keywords
poly
substrate
birdpeak
si3n4
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12121379A
Other languages
Japanese (ja)
Inventor
Shunichi Kai
Yutaka Etsuno
Kuniaki Kumamaru
Seiji Yasuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12121379A priority Critical patent/JPS5645051A/en
Publication of JPS5645051A publication Critical patent/JPS5645051A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To prevent the occurrence of birdpeak by providing a thin film for buffer on the interference between a semiconductor substrate and an Si3N4 film wherein the thin film has a diffusion coefficient which is equivalent to or below that of an oxidizing agent for a substrate. CONSTITUTION:Poly Si 22 is placed on a p type Si substrate 21 in piles. B is doped by opening the poly Si 22 by an Si3N4 mask 23 to form isolation layers 25a, 25b by wet oxidation. Birdpeak is extremely small as the diffusion coefficient of O2 is same for Si and poly Si. The Si3N4 23 is removed and the poly Si 22 is convereted into SiO2. Then the poly Si 22 is removed by HF solution. SiO2 26 and poly Si 27 are placed on the p type Si substrate 21 in piles for selective opening 29. After forming n<+> layers 30, 31, the poly Si 27 is selectively left to cover with PSG 32. Electrodes 33 are provided by selectively opening the PSG 32 to cover with an oxide film 34. In this composition, high integration and the improvement of the reliability for element characteristics will be attained as the occurrence of birdpeak is extremely small.
JP12121379A 1979-09-20 1979-09-20 Manufacture of semiconductor device Pending JPS5645051A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12121379A JPS5645051A (en) 1979-09-20 1979-09-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12121379A JPS5645051A (en) 1979-09-20 1979-09-20 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5645051A true JPS5645051A (en) 1981-04-24

Family

ID=14805669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12121379A Pending JPS5645051A (en) 1979-09-20 1979-09-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5645051A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59202328A (en) * 1983-04-28 1984-11-16 Matsushita Electric Ind Co Ltd High-frequency heating device with electric heater
JPH01162351A (en) * 1987-12-19 1989-06-26 Fujitsu Ltd Manufacture of semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3900350A (en) * 1972-04-08 1975-08-19 Philips Corp Method of manufacturing semiconductor devices in which silicon oxide regions inset in silicon are formed by a masking oxidation, wherein an intermediate layer of polycrystalline silicon is provided between the substrate and the oxidation mask

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3900350A (en) * 1972-04-08 1975-08-19 Philips Corp Method of manufacturing semiconductor devices in which silicon oxide regions inset in silicon are formed by a masking oxidation, wherein an intermediate layer of polycrystalline silicon is provided between the substrate and the oxidation mask

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59202328A (en) * 1983-04-28 1984-11-16 Matsushita Electric Ind Co Ltd High-frequency heating device with electric heater
JPH0343538B2 (en) * 1983-04-28 1991-07-02 Matsushita Electric Ind Co Ltd
JPH01162351A (en) * 1987-12-19 1989-06-26 Fujitsu Ltd Manufacture of semiconductor device

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