JPS5637675A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5637675A
JPS5637675A JP11379879A JP11379879A JPS5637675A JP S5637675 A JPS5637675 A JP S5637675A JP 11379879 A JP11379879 A JP 11379879A JP 11379879 A JP11379879 A JP 11379879A JP S5637675 A JPS5637675 A JP S5637675A
Authority
JP
Japan
Prior art keywords
layer
boron
coated
polycrystalline
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11379879A
Other languages
Japanese (ja)
Inventor
Akira Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11379879A priority Critical patent/JPS5637675A/en
Publication of JPS5637675A publication Critical patent/JPS5637675A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a high cut-off frequency in a PNP type transistor while easily facilitating its design by employing a diffusion source obtained by selectively adding boron to a nonaddition polycrystalline Si layer to form an emitter region when forming the transistor. CONSTITUTION:An SiO2 film 2 is coated on a P type Si substrate 1 becoming a collector, an opening is perforated thereat, an N type base region 3 is diffused, no- addition polycrystalline Si layer 4 is grown in vapor phase on the entire surface, and an Si3N4 layer 5 and an SiO2 layer 6 are coated thereon. Then, an opening 7 reaching the layer 4 is perforated at these layers, the layer 4 is partly exposed, with the layer 6 as a mask boron ions are implanted, and the layer 4 is partly altered into a boron-added polycrystalline Si layer 8. Thereafter, the layer 5 formed therearound is sidewisely etched with a hot phosphoric acid, and a constricted region 9 is formed, the layer 4 of fast etching speed exposed here is removed with alkaline solution, a vacity 10 is thus formed, and the layer 8 is independently formed. Subsequently, the layers 6 and 5 are removed, the layer 8 is coated with an SiO2 layer 11, is heat treated, and boron in the layer 8 is diffused in a P type emitter region 12.
JP11379879A 1979-09-05 1979-09-05 Manufacture of semiconductor device Pending JPS5637675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11379879A JPS5637675A (en) 1979-09-05 1979-09-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11379879A JPS5637675A (en) 1979-09-05 1979-09-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5637675A true JPS5637675A (en) 1981-04-11

Family

ID=14621339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11379879A Pending JPS5637675A (en) 1979-09-05 1979-09-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5637675A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60235461A (en) * 1984-05-08 1985-11-22 Nec Corp Manufacture of semiconductor device
JPS60241687A (en) * 1984-05-15 1985-11-30 西谷 光夫 Method of connecting copper wire to connecting terminal and its connecting terminal

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60235461A (en) * 1984-05-08 1985-11-22 Nec Corp Manufacture of semiconductor device
JPS60241687A (en) * 1984-05-15 1985-11-30 西谷 光夫 Method of connecting copper wire to connecting terminal and its connecting terminal
JPH0471316B2 (en) * 1984-05-15 1992-11-13 Mitsuo Nishitani

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