JPS55128868A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS55128868A
JPS55128868A JP3677279A JP3677279A JPS55128868A JP S55128868 A JPS55128868 A JP S55128868A JP 3677279 A JP3677279 A JP 3677279A JP 3677279 A JP3677279 A JP 3677279A JP S55128868 A JPS55128868 A JP S55128868A
Authority
JP
Japan
Prior art keywords
sio
film
emitter
coated
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3677279A
Other languages
Japanese (ja)
Inventor
Yasutaka Nakatani
Shigeaki Nawata
Haruki Nakazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3677279A priority Critical patent/JPS55128868A/en
Publication of JPS55128868A publication Critical patent/JPS55128868A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent the short between an emitter and a base of a semiconductor device by forming emitter diffusing opening having desired size and area initially and sidewisely etching to expand the base area subsequently.
CONSTITUTION: A SiO2 41 and Si3N4 42 are laminated on a substrate 40 formed with an n--type epitaxial layer in an n-type silicon, and a SiO2 film is coated thereon for next photoetching process. A photoresist is coated thereon, exposed to the developed, the SiO2 and Si3N4 are selectively etched with fluoric acid and phosphoric acid to form diffused opening 43, As is implanted to form an emitter layer E. Then, the substrate is laterally etched with fluoric acid. Thereafter, the film 43 is removed by the phosphoric acid, and B is thermally diffused therein. Then, the B overrides the As to form a based layer B and a SiO2 film 44. Openings are selectively perforated at the film 44 to form electrodes 45, 46. According to this process, it is very effective for the fabrication of a high frequency high power transistor having a problem at the emitter peripheral length.
COPYRIGHT: (C)1980,JPO&Japio
JP3677279A 1979-03-28 1979-03-28 Method of fabricating semiconductor device Pending JPS55128868A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3677279A JPS55128868A (en) 1979-03-28 1979-03-28 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3677279A JPS55128868A (en) 1979-03-28 1979-03-28 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS55128868A true JPS55128868A (en) 1980-10-06

Family

ID=12479048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3677279A Pending JPS55128868A (en) 1979-03-28 1979-03-28 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS55128868A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51102472A (en) * 1971-03-17 1976-09-09 Philips Nv
JPS5223263A (en) * 1975-08-18 1977-02-22 Nec Corp Method of manufacturing semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51102472A (en) * 1971-03-17 1976-09-09 Philips Nv
JPS5223263A (en) * 1975-08-18 1977-02-22 Nec Corp Method of manufacturing semiconductor device

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