JPS5627960A - Rom cell - Google Patents
Rom cellInfo
- Publication number
- JPS5627960A JPS5627960A JP10478379A JP10478379A JPS5627960A JP S5627960 A JPS5627960 A JP S5627960A JP 10478379 A JP10478379 A JP 10478379A JP 10478379 A JP10478379 A JP 10478379A JP S5627960 A JPS5627960 A JP S5627960A
- Authority
- JP
- Japan
- Prior art keywords
- doping region
- electrode
- bit line
- gate
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
Abstract
PURPOSE:To miniaturize the configuration and to reduce the power consumption by providing a doping region at the location adjacent to the portion directly under the gate electrode of a semiconductor substrate of an MIStype capacitor, connecting the gate electrode to a word line, and connecting the doping regions to a bit line. CONSTITUTION:The extension of a gate electrde 1 is transformed into a word line W, and an N<+>region 2 which is a high-concentration doping region is connected to a bit line B via a contact 5. While, an MIS capacitor is constituted by a Ptype Si substrate 3, a gate insulating film 4, and a gate electrode 1. The P type Si substrate 3 directly under the gate insulating film 4 constitutes one electrode of the MIS capacitor, and the N<+>doping region 2 is provided at the portion adjacent to the electrode. Furthermore, the N<+>doping region 2 is connected to the bit line B via a contact 5. The insulation between those wirings are effected by SiO2 films 6 and 7.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10478379A JPS5627960A (en) | 1979-08-16 | 1979-08-16 | Rom cell |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10478379A JPS5627960A (en) | 1979-08-16 | 1979-08-16 | Rom cell |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5627960A true JPS5627960A (en) | 1981-03-18 |
Family
ID=14390061
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10478379A Pending JPS5627960A (en) | 1979-08-16 | 1979-08-16 | Rom cell |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5627960A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52155930A (en) * | 1976-06-18 | 1977-12-24 | Ncr Co | Reloadable capacitive memory array |
JPS5333076A (en) * | 1976-09-09 | 1978-03-28 | Toshiba Corp | Production of mos type integrated circuit |
JPS5377480A (en) * | 1976-12-21 | 1978-07-08 | Nec Corp | Production of semiconductor integrated circuit device |
-
1979
- 1979-08-16 JP JP10478379A patent/JPS5627960A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS52155930A (en) * | 1976-06-18 | 1977-12-24 | Ncr Co | Reloadable capacitive memory array |
JPS5333076A (en) * | 1976-09-09 | 1978-03-28 | Toshiba Corp | Production of mos type integrated circuit |
JPS5377480A (en) * | 1976-12-21 | 1978-07-08 | Nec Corp | Production of semiconductor integrated circuit device |
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