JPS56169346A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56169346A
JPS56169346A JP7155480A JP7155480A JPS56169346A JP S56169346 A JPS56169346 A JP S56169346A JP 7155480 A JP7155480 A JP 7155480A JP 7155480 A JP7155480 A JP 7155480A JP S56169346 A JPS56169346 A JP S56169346A
Authority
JP
Japan
Prior art keywords
semiconductor device
ingot
manufacturing steps
dislocation
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7155480A
Other languages
Japanese (ja)
Inventor
Shigeru Kamiya
Toshiyuki Hidaka
Yukio Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Power Semiconductor Device Ltd
Original Assignee
Hitachi Ltd
Hitachi Haramachi Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Haramachi Electronics Ltd filed Critical Hitachi Ltd
Priority to JP7155480A priority Critical patent/JPS56169346A/en
Publication of JPS56169346A publication Critical patent/JPS56169346A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Abstract

PURPOSE:To prevent the occurrence of a dislocation caused by a heat treatment in manufacturing steps by etching the surface of a crystalline plate cut from an ingot with an aqueous alkali solution to remove dislocation production source and heat treating it. CONSTITUTION:The surface of an Si substrate obtained by cutting from an ingot is etched and polished in a thickness of 0.5-3mum with 20-60% aqueous solution of KOH. A dislocation caused from a cut strain layer during the manufacturing steps of a semiconductor device can be suppressed by this treatment, and the secondary warp of the substrate can also be reduced.
JP7155480A 1980-05-30 1980-05-30 Manufacture of semiconductor device Pending JPS56169346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7155480A JPS56169346A (en) 1980-05-30 1980-05-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7155480A JPS56169346A (en) 1980-05-30 1980-05-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56169346A true JPS56169346A (en) 1981-12-26

Family

ID=13464059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7155480A Pending JPS56169346A (en) 1980-05-30 1980-05-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56169346A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0628992A2 (en) * 1993-06-08 1994-12-14 Shin-Etsu Handotai Company Limited Method of making semiconductor wafers
WO2001034877A1 (en) * 1999-11-10 2001-05-17 Memc Electronic Materials, Inc. Alkaline etching solution and process for etching semiconductor wafers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0628992A2 (en) * 1993-06-08 1994-12-14 Shin-Etsu Handotai Company Limited Method of making semiconductor wafers
EP0628992A3 (en) * 1993-06-08 1997-05-02 Shinetsu Handotai Kk Method of making semiconductor wafers.
WO2001034877A1 (en) * 1999-11-10 2001-05-17 Memc Electronic Materials, Inc. Alkaline etching solution and process for etching semiconductor wafers

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