JPS56140659A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56140659A
JPS56140659A JP4430180A JP4430180A JPS56140659A JP S56140659 A JPS56140659 A JP S56140659A JP 4430180 A JP4430180 A JP 4430180A JP 4430180 A JP4430180 A JP 4430180A JP S56140659 A JPS56140659 A JP S56140659A
Authority
JP
Japan
Prior art keywords
glass
attached
sio2
wax
cracks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4430180A
Other languages
Japanese (ja)
Inventor
Kazuko Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4430180A priority Critical patent/JPS56140659A/en
Publication of JPS56140659A publication Critical patent/JPS56140659A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To eliminate a withstand fault by a method wherein a region located inwardly to a some extent from an end edge of an SiO2 mask pattern is covered with acid-proof wax and applied a mesa etching. CONSTITUTION:The SiO2 5 at the part where the mesa is formed by a phototyping technic is removed and a window 16 is opened. The acid-proof wax 8 is printed on the SiO2 at about 100mu inside the end edge and chemically etched. After the wax 8 is melted, the Si surface is lightly etched and attached with glass 10 by an electrophoresis method and burning-fused. Then, an electrode 11 is formed and separated into an individual. With this construction, since a pin hole is removed, the glass is not attached to the pin hole and cracks are decreased during the process. In addition, since the glass is not attached to the electrode surface during the supersonic junction of an A wire, the Si substrate is prevented from scooped cracks.
JP4430180A 1980-04-04 1980-04-04 Manufacture of semiconductor device Pending JPS56140659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4430180A JPS56140659A (en) 1980-04-04 1980-04-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4430180A JPS56140659A (en) 1980-04-04 1980-04-04 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS56140659A true JPS56140659A (en) 1981-11-04

Family

ID=12687674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4430180A Pending JPS56140659A (en) 1980-04-04 1980-04-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56140659A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0627350U (en) * 1992-09-09 1994-04-12 有限会社プリオール Roof carrier with roof cover for cabin
CN109309001A (en) * 2017-07-26 2019-02-05 天津环鑫科技发展有限公司 A method of GPP chip is made using printing technology

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0627350U (en) * 1992-09-09 1994-04-12 有限会社プリオール Roof carrier with roof cover for cabin
CN109309001A (en) * 2017-07-26 2019-02-05 天津环鑫科技发展有限公司 A method of GPP chip is made using printing technology

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