JPS5562765A - Method of fabricating semiconductor device - Google Patents
Method of fabricating semiconductor deviceInfo
- Publication number
- JPS5562765A JPS5562765A JP13539978A JP13539978A JPS5562765A JP S5562765 A JPS5562765 A JP S5562765A JP 13539978 A JP13539978 A JP 13539978A JP 13539978 A JP13539978 A JP 13539978A JP S5562765 A JPS5562765 A JP S5562765A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- substrate
- gold
- type
- diffused
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bipolar Transistors (AREA)
Abstract
PURPOSE: To improve the switching speed of a semiconductor device by forming an ion implanted layer not affected by conductivity type at predetermined portion in a semiconductor substrate and collecting diffused gold in the layer.
CONSTITUTION: A P-type impurity is adhered at 4 through an opening 3 of the insulator film 2 of an N-type substrate 1, argon (Ar) ion or the like is implanted without adverse effect to its conductivity to thereby form an ion implanted layer 8 in parallel with the main surface in predetermined depth. It is diffused from the layer 4 by heat treatment, a P-type base layer 5 is formed so as not to reach the layer 8. Then, phosphorus is diffused in part of the layer 5 to thereby form an N- type emitter layer 6 thereat, gold 7 is deposited on the substrate 1. Then, it is thermally treated to thereby diffuse gold in the layer 7 into the entire substrate. Finally, electrodes are provided on the substrate 1 and the layers 5, 6. According to this configuration, the gold is collected greater in the layer 8 due to infinitesimal crystal strain residued thereat even after the heat treatment so that the life of minority carrier is short in the layer 8. Accordingly, in operation, the life of the minority carrier of the collector layer is sufficiently short to thereby improve the switching speed of the semiconductor device.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13539978A JPS5562765A (en) | 1978-11-01 | 1978-11-01 | Method of fabricating semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13539978A JPS5562765A (en) | 1978-11-01 | 1978-11-01 | Method of fabricating semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5562765A true JPS5562765A (en) | 1980-05-12 |
Family
ID=15150798
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13539978A Pending JPS5562765A (en) | 1978-11-01 | 1978-11-01 | Method of fabricating semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5562765A (en) |
-
1978
- 1978-11-01 JP JP13539978A patent/JPS5562765A/en active Pending
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