JPS5541764A - Manufacturing semiconductor element - Google Patents

Manufacturing semiconductor element

Info

Publication number
JPS5541764A
JPS5541764A JP11534778A JP11534778A JPS5541764A JP S5541764 A JPS5541764 A JP S5541764A JP 11534778 A JP11534778 A JP 11534778A JP 11534778 A JP11534778 A JP 11534778A JP S5541764 A JPS5541764 A JP S5541764A
Authority
JP
Japan
Prior art keywords
film
region
polycrystal
deposited
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11534778A
Other languages
Japanese (ja)
Inventor
Masamitsu Yamauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11534778A priority Critical patent/JPS5541764A/en
Publication of JPS5541764A publication Critical patent/JPS5541764A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enhance contact property by etching out only the surface layer of an Si3N4 film by plasma gas of carbon fluoride in the case openings are provided through an SiO2 film, a polycrystal Si film, an Al2O3 film, and the like deposited on an Si3N4 film, on which an electrode metal is provided.
CONSTITUTION: A base diffused region 2 is formed in a semiconductor substrate 1, and an emitter diffused region 10 is provided in the region 2. An SiO2 film 3 and an Si3N4 film 4 are stacked and deposited on all over the surface. Then, an opening is made in the region 10, and a polycrystal Si film 8 which contains O2 is provided. At the same time a base contact opening 11 which reaches the region 2 is provided through the stacked films contatining intermediate compound 9 of Si3N4 and polycrystal Si which is generated on the film 4. Thereafter, the inside of the opening 11 and the film 8 are protected by photosensitive resin 13. The film 4 is lightly etched by the use of carbon tetrafluoride gas and the compound 9 is removed at the same time. In this method the surface of the film 4 is cleaned, and a Ti-Pt-Au electrode 12, which is contacted with the film 8 and the region 2, is deposited thereon.
COPYRIGHT: (C)1980,JPO&Japio
JP11534778A 1978-09-19 1978-09-19 Manufacturing semiconductor element Pending JPS5541764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11534778A JPS5541764A (en) 1978-09-19 1978-09-19 Manufacturing semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11534778A JPS5541764A (en) 1978-09-19 1978-09-19 Manufacturing semiconductor element

Publications (1)

Publication Number Publication Date
JPS5541764A true JPS5541764A (en) 1980-03-24

Family

ID=14660270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11534778A Pending JPS5541764A (en) 1978-09-19 1978-09-19 Manufacturing semiconductor element

Country Status (1)

Country Link
JP (1) JPS5541764A (en)

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