JPS553690A - Semiconductor luminous indicator - Google Patents

Semiconductor luminous indicator

Info

Publication number
JPS553690A
JPS553690A JP3975379A JP3975379A JPS553690A JP S553690 A JPS553690 A JP S553690A JP 3975379 A JP3975379 A JP 3975379A JP 3975379 A JP3975379 A JP 3975379A JP S553690 A JPS553690 A JP S553690A
Authority
JP
Japan
Prior art keywords
led
base
color
external
sticked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3975379A
Other languages
English (en)
Other versions
JPS5644591B2 (ja
Inventor
Hiroshi Katsumura
Hiroshi Fujita
Hiroshi Kaneda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3975379A priority Critical patent/JPS553690A/ja
Publication of JPS553690A publication Critical patent/JPS553690A/ja
Publication of JPS5644591B2 publication Critical patent/JPS5644591B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Wire Bonding (AREA)
JP3975379A 1979-04-04 1979-04-04 Semiconductor luminous indicator Granted JPS553690A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3975379A JPS553690A (en) 1979-04-04 1979-04-04 Semiconductor luminous indicator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3975379A JPS553690A (en) 1979-04-04 1979-04-04 Semiconductor luminous indicator

Publications (2)

Publication Number Publication Date
JPS553690A true JPS553690A (en) 1980-01-11
JPS5644591B2 JPS5644591B2 (ja) 1981-10-20

Family

ID=12561703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3975379A Granted JPS553690A (en) 1979-04-04 1979-04-04 Semiconductor luminous indicator

Country Status (1)

Country Link
JP (1) JPS553690A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041227A (ja) * 1983-08-15 1985-03-04 Hitachi Ltd ホトレジストパタ−ンの変形防止方法
JPS61220328A (ja) * 1985-03-22 1986-09-30 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション リフト・オフ・マスクの製造方法
JPS62111425A (ja) * 1985-10-28 1987-05-22 Ushio Inc レジスト処理方法
EP0588040A2 (en) * 1992-08-20 1994-03-23 Hewlett-Packard Company Light source and technique for mounting light emitting diodes
JP2007329155A (ja) * 2006-06-06 2007-12-20 Fujikura Ltd 発光ダイオード光源装置とその製造方法、照明装置、表示装置及び交通信号機

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024143U (ja) * 1983-07-19 1985-02-19 オンキヨー株式会社 電源回路

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041227A (ja) * 1983-08-15 1985-03-04 Hitachi Ltd ホトレジストパタ−ンの変形防止方法
JPH0466021B2 (ja) * 1983-08-15 1992-10-21 Hitachi Ltd
JPS61220328A (ja) * 1985-03-22 1986-09-30 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション リフト・オフ・マスクの製造方法
JPH033378B2 (ja) * 1985-03-22 1991-01-18 Intaanashonaru Bijinesu Mashiinzu Corp
JPS62111425A (ja) * 1985-10-28 1987-05-22 Ushio Inc レジスト処理方法
EP0588040A2 (en) * 1992-08-20 1994-03-23 Hewlett-Packard Company Light source and technique for mounting light emitting diodes
EP0588040A3 (en) * 1992-08-20 1994-04-06 Hewlett-Packard Company Light source and technique for mounting light emitting diodes
EP0739043A2 (en) * 1992-08-20 1996-10-23 Hewlett-Packard Company Light source and technique for mounting light emitting diodes
EP0739043A3 (en) * 1992-08-20 1997-10-29 Hewlett Packard Co Light source and method for mounting light-emitting diodes
EP0843365A2 (en) * 1992-08-20 1998-05-20 Hewlett-Packard Company Light source and technique for mounting light emitting diodes
EP0843365A3 (en) * 1992-08-20 1998-11-11 Hewlett-Packard Company Light source and technique for mounting light emitting diodes
JP2007329155A (ja) * 2006-06-06 2007-12-20 Fujikura Ltd 発光ダイオード光源装置とその製造方法、照明装置、表示装置及び交通信号機

Also Published As

Publication number Publication date
JPS5644591B2 (ja) 1981-10-20

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