JPS5519867A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS5519867A
JPS5519867A JP9290578A JP9290578A JPS5519867A JP S5519867 A JPS5519867 A JP S5519867A JP 9290578 A JP9290578 A JP 9290578A JP 9290578 A JP9290578 A JP 9290578A JP S5519867 A JPS5519867 A JP S5519867A
Authority
JP
Japan
Prior art keywords
memory
gate
drain
range
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9290578A
Other languages
Japanese (ja)
Other versions
JPS6050071B2 (en
Inventor
Heihachi Matsumoto
Kokichi Sawada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP53092905A priority Critical patent/JPS6050071B2/en
Publication of JPS5519867A publication Critical patent/JPS5519867A/en
Publication of JPS6050071B2 publication Critical patent/JPS6050071B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS

Abstract

PURPOSE:For preventing the generation of weak write on read, to make bias impression on the control gate constitution a memory earlier than that on drain. CONSTITUTION:A FAMOS memory is made through the process consisting of forming N<+>-type drain range 2 and N<+>-type source range 3 on a P<->-type Si substrate and burying floating gate 4 and control gate 5 in the oxidized film 6 on the portion between said ranges 2 and 3 of said substrate 1. Next, a decoder circuit is made by interconnecting a number of said memory. The delay time thereof is proportionate to the quantity of said memory. Therefore, the signals to be fed to said gate 5 and drain range 2 are selected in accordance with four and six addess signals respectively for shortening delay time. Namely, the generation of thermions in the channel between said ranges 2 and 3 is prevented by impressing positive bias on said gate 5 earlier than bias impression on said drain range 2 for preventing erroneous operation.
JP53092905A 1978-07-28 1978-07-28 semiconductor memory device Expired JPS6050071B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53092905A JPS6050071B2 (en) 1978-07-28 1978-07-28 semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53092905A JPS6050071B2 (en) 1978-07-28 1978-07-28 semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS5519867A true JPS5519867A (en) 1980-02-12
JPS6050071B2 JPS6050071B2 (en) 1985-11-06

Family

ID=14067488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53092905A Expired JPS6050071B2 (en) 1978-07-28 1978-07-28 semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6050071B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58104873A (en) * 1981-12-04 1983-06-22 ゲブリユ−ダ−・レプフエ・アクチエンゲゼルシヤフト Method of obtaining length of yarn wound onto traversing package through friction drive through drum with groove
US5761127A (en) * 1991-11-20 1998-06-02 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58104873A (en) * 1981-12-04 1983-06-22 ゲブリユ−ダ−・レプフエ・アクチエンゲゼルシヤフト Method of obtaining length of yarn wound onto traversing package through friction drive through drum with groove
US5761127A (en) * 1991-11-20 1998-06-02 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
US5835408A (en) * 1991-11-20 1998-11-10 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
US5835416A (en) * 1991-11-20 1998-11-10 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
US5870337A (en) * 1991-11-20 1999-02-09 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability
US5910916A (en) * 1991-11-20 1999-06-08 Fujitsu Limited Flash-erasable semiconductor memory device having improved reliability
US6014329A (en) * 1991-11-20 2000-01-11 Fujitsu Limited Flash-erasable semiconductor memory device having an improved reliability

Also Published As

Publication number Publication date
JPS6050071B2 (en) 1985-11-06

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