JPS55107245A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS55107245A
JPS55107245A JP1387479A JP1387479A JPS55107245A JP S55107245 A JPS55107245 A JP S55107245A JP 1387479 A JP1387479 A JP 1387479A JP 1387479 A JP1387479 A JP 1387479A JP S55107245 A JPS55107245 A JP S55107245A
Authority
JP
Japan
Prior art keywords
layer
ions
selectively
poly
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1387479A
Other languages
Japanese (ja)
Inventor
Yoshihide Nagakubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP1387479A priority Critical patent/JPS55107245A/en
Publication of JPS55107245A publication Critical patent/JPS55107245A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: To form a highly accurate, integrated and high resistance element in a portion wherein a thin layer is formed by selectively etching the pattern desired on a poly-Si layer which is uniformly formed.
CONSTITUTION: An element isolating region 23 is formed by selectively oxidizing a Si substrate 21, and a poly-Si layer 24 is accumulated after the formation of a gate oxide film. Next a resist mask 25 is added by patterning the layer 24. Then ions are injected by controlling the injecting quantity of energy and ions. After removing the mask 25 and providing plasma etching, the layer 24 is selectively made thin according to the difference in etching speed. By this method, it is possible to form a high resistance layer desired readily and accurately by controlling the quantity of injecting ions.
COPYRIGHT: (C)1980,JPO&Japio
JP1387479A 1979-02-09 1979-02-09 Manufacture of semiconductor device Pending JPS55107245A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1387479A JPS55107245A (en) 1979-02-09 1979-02-09 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1387479A JPS55107245A (en) 1979-02-09 1979-02-09 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS55107245A true JPS55107245A (en) 1980-08-16

Family

ID=11845366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1387479A Pending JPS55107245A (en) 1979-02-09 1979-02-09 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS55107245A (en)

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