JPS55105361A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS55105361A JPS55105361A JP16581378A JP16581378A JPS55105361A JP S55105361 A JPS55105361 A JP S55105361A JP 16581378 A JP16581378 A JP 16581378A JP 16581378 A JP16581378 A JP 16581378A JP S55105361 A JPS55105361 A JP S55105361A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating film
- gate
- single crystal
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 239000013078 crystal Substances 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract 1
- 229910052593 corundum Inorganic materials 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 229920005591 polysilicon Polymers 0.000 abstract 1
- 239000007787 solid Substances 0.000 abstract 1
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Recrystallisation Techniques (AREA)
Abstract
PURPOSE:To obtain a semiconductor device of a solid multilayer structure by using a wafer in which a single crystal insulating layer and a single crystal semiconductor layer are epitaxially grown in sequence on a single crystal semiconductor substrate. CONSTITUTION:The Al2O3 layer 2 and n-type Si layer 3 are epitaxially grown on the p- type Si substrate 1, and the surface is covered with SiO2 layer 4. Next it is etched and opened in turn to expose the substrate 1, the SiO2 layer 4' and polysilicon layer 5 are laminated on it. The resist mask 6 is provided, the gate 5Gn and the gate insulating film 4Gn are shaped, the n<+>-layers 7n, 8n are formed by ion implantation. The mask 6 is removed, the resist mask 11 is provided, a laminated body of both the gate 5Gp and the gate insulating film 4Gp is selectively shaped, the p<+>- type diffusion layers 9p, 10p are formed. The mask 11 is removed, the insulating film, electrodes and wiring are provided in accordance with a specification. At this time, the step part is made specially wide or the insulating film of the n channel part is made thick to prevent the breakage of wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53165813A JPS6015155B2 (en) | 1978-12-30 | 1978-12-30 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53165813A JPS6015155B2 (en) | 1978-12-30 | 1978-12-30 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55105361A true JPS55105361A (en) | 1980-08-12 |
| JPS6015155B2 JPS6015155B2 (en) | 1985-04-17 |
Family
ID=15819476
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP53165813A Expired JPS6015155B2 (en) | 1978-12-30 | 1978-12-30 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6015155B2 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59111355A (en) * | 1982-12-17 | 1984-06-27 | Nippon Precision Saakitsutsu Kk | Semiconductor device |
| JPS6113662A (en) * | 1984-06-28 | 1986-01-21 | Nippon Telegr & Teleph Corp <Ntt> | Complementary type mis transistor device and manufacture thereof |
| US4571609A (en) * | 1980-06-16 | 1986-02-18 | Tokyo Shibaura Denki Kabushiki Kaisha | Stacked MOS device with means to prevent substrate floating |
| US4635089A (en) * | 1981-10-28 | 1987-01-06 | Kabushiki Kaisha Daini Seikosha | MIS-integrated semiconductor device |
| JPS6239047A (en) * | 1985-08-13 | 1987-02-20 | Toppan Printing Co Ltd | Cmos integrated circuit device |
| JPS632372A (en) * | 1986-06-20 | 1988-01-07 | Nec Corp | Manufacture of complementary mos integrated circuit |
| JPH0395665U (en) * | 1990-11-15 | 1991-09-30 | ||
| US5534722A (en) * | 1993-03-08 | 1996-07-09 | Seiko Instruments Inc. | Insulator substrate for a light valve device having an electrostatic protection region |
-
1978
- 1978-12-30 JP JP53165813A patent/JPS6015155B2/en not_active Expired
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4571609A (en) * | 1980-06-16 | 1986-02-18 | Tokyo Shibaura Denki Kabushiki Kaisha | Stacked MOS device with means to prevent substrate floating |
| US4635089A (en) * | 1981-10-28 | 1987-01-06 | Kabushiki Kaisha Daini Seikosha | MIS-integrated semiconductor device |
| JPS59111355A (en) * | 1982-12-17 | 1984-06-27 | Nippon Precision Saakitsutsu Kk | Semiconductor device |
| JPS6113662A (en) * | 1984-06-28 | 1986-01-21 | Nippon Telegr & Teleph Corp <Ntt> | Complementary type mis transistor device and manufacture thereof |
| JPS6239047A (en) * | 1985-08-13 | 1987-02-20 | Toppan Printing Co Ltd | Cmos integrated circuit device |
| JPS632372A (en) * | 1986-06-20 | 1988-01-07 | Nec Corp | Manufacture of complementary mos integrated circuit |
| JPH0395665U (en) * | 1990-11-15 | 1991-09-30 | ||
| JPH0534115Y2 (en) * | 1990-11-15 | 1993-08-30 | ||
| US5534722A (en) * | 1993-03-08 | 1996-07-09 | Seiko Instruments Inc. | Insulator substrate for a light valve device having an electrostatic protection region |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6015155B2 (en) | 1985-04-17 |
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