JPS57160152A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57160152A JPS57160152A JP56045549A JP4554981A JPS57160152A JP S57160152 A JPS57160152 A JP S57160152A JP 56045549 A JP56045549 A JP 56045549A JP 4554981 A JP4554981 A JP 4554981A JP S57160152 A JPS57160152 A JP S57160152A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- layer
- wiring layer
- type
- well
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 239000012535 impurity Substances 0.000 abstract 5
- 238000009792 diffusion process Methods 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 230000001939 inductive effect Effects 0.000 abstract 1
- 238000005468 ion implantation Methods 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Transistors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
PURPOSE:To reduce parasitic capacity and to simultaneously increase leakage resistant dielectric strength by forming the diffusion wiring layer in a P well having low impurity concentration. CONSTITUTION:An N<-> epitaxial layer 3 with low impurity concentration is formed on a P<-> type Si substrate 1. A P type well 8 with low concentration is formed by deeply inducing and diffusing a P type impurity by selective ion implantation so that the P type impurity may reach the substrate 1 from the surface of the layer 3. An N<+> diffusion wiring layer 5 is formed by depositioning and diffusing an N type impurity made at the time of emitter diffusion to a part of the surface of the well 8. An Al wiring 7 is formed on the layer 5 through an SiO2 film 6 in the direction crossing with a wiring layer 5. Meanwhile, contact holes 9 are bored at a part of the wiring layer 5 by putting the wiring 7 between the holes 9 and the wiring 7 is contacted with the wiring layer 5 through the holes 9. And Al wirings 10 are formed in the direction crossing with the Al wiring 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56045549A JPS57160152A (en) | 1981-03-30 | 1981-03-30 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56045549A JPS57160152A (en) | 1981-03-30 | 1981-03-30 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57160152A true JPS57160152A (en) | 1982-10-02 |
Family
ID=12722438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56045549A Pending JPS57160152A (en) | 1981-03-30 | 1981-03-30 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57160152A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61284938A (en) * | 1985-06-10 | 1986-12-15 | Nec Ic Microcomput Syst Ltd | Integrated circuit device |
| JPH02135772A (en) * | 1988-11-16 | 1990-05-24 | Mitsubishi Electric Corp | Semiconductor device |
-
1981
- 1981-03-30 JP JP56045549A patent/JPS57160152A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61284938A (en) * | 1985-06-10 | 1986-12-15 | Nec Ic Microcomput Syst Ltd | Integrated circuit device |
| JPH02135772A (en) * | 1988-11-16 | 1990-05-24 | Mitsubishi Electric Corp | Semiconductor device |
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