JPS5469393A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5469393A
JPS5469393A JP13716277A JP13716277A JPS5469393A JP S5469393 A JPS5469393 A JP S5469393A JP 13716277 A JP13716277 A JP 13716277A JP 13716277 A JP13716277 A JP 13716277A JP S5469393 A JPS5469393 A JP S5469393A
Authority
JP
Japan
Prior art keywords
wiring
film
groove
wiring part
metallic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13716277A
Other languages
Japanese (ja)
Inventor
Shigeharu Abe
Makoto Serigano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13716277A priority Critical patent/JPS5469393A/en
Publication of JPS5469393A publication Critical patent/JPS5469393A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To obtain a flat multilayer wiring without using liquid glass by separating a wiring metallic film into a wiring part and a non-wiring part by a groove and burying this groove with insulating materials.
CONSTITUTION: Polycrystal Si film 12 is grown in a vapour phase on Si substrate 11, and groove forming photo resistor pattern 13 to separate a metallic wiring from other metallic films is formed on film 12. Next, Al film 14 is evaporated throughout the surface, and pattern 13 is removed to generate Al wiring part 14', and a groove between film 14 and part 14' is etched to expose the surface of substrate 11. After that, PSG film 15 is grown throughout the surface to bury the groove with film 15, and an electrode contact window is opened on wiring part 14'. After that, the second-layer Al wiring 16 is evaporated from wiring part 14' to film 15, thereby giving a multilayer wiring structure. As a result, no cut is generated in the second-layer Al wiring, and a flat surface can be obtained.
COPYRIGHT: (C)1979,JPO&Japio
JP13716277A 1977-11-14 1977-11-14 Production of semiconductor device Pending JPS5469393A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13716277A JPS5469393A (en) 1977-11-14 1977-11-14 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13716277A JPS5469393A (en) 1977-11-14 1977-11-14 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5469393A true JPS5469393A (en) 1979-06-04

Family

ID=15192260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13716277A Pending JPS5469393A (en) 1977-11-14 1977-11-14 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5469393A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5652465A (en) * 1994-12-26 1997-07-29 Fujitsu Limited Semiconductor device having dummy patterns and an upper insulating layer having cavities
US6099992A (en) * 1994-12-12 2000-08-08 Fujitsu Limited Method for designing reticle, reticle, and method for manufacturing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6099992A (en) * 1994-12-12 2000-08-08 Fujitsu Limited Method for designing reticle, reticle, and method for manufacturing semiconductor device
US6553274B1 (en) 1994-12-12 2003-04-22 Fujitsu Limited Method for designing reticle, reticle, and method for manufacturing semiconductor device
US5652465A (en) * 1994-12-26 1997-07-29 Fujitsu Limited Semiconductor device having dummy patterns and an upper insulating layer having cavities
US5946557A (en) * 1994-12-26 1999-08-31 Fujitsu Ltd. Method of manufacturing a semiconductor device having dummy patterns and an upper insulating layer having cavities

Similar Documents

Publication Publication Date Title
JPS5355986A (en) Manufacture of semiconductor device
JPS5469393A (en) Production of semiconductor device
JPS5559741A (en) Preparation of semiconductor device
JPS5467766A (en) Semiconductor device
JPS5491087A (en) Manufacture of thin-film solar cell
JPS57145340A (en) Manufacture of semiconductor device
JPS52149076A (en) Semiconductor integrated circuit and its preparing method
JPS5469394A (en) Semiconductor device
JPS5444477A (en) Manufacture for semiconductor device
JPS5289468A (en) Semiconductor device
JPS53137685A (en) Manufacture for semiconductor device
JPS52153373A (en) Preparation of semiconductor device
JPS5715423A (en) Manufacture of semiconductor device
JPS5687346A (en) Manufacture of semiconductor device
JPS5646582A (en) Formation of pattern of filmlike article
JPS5282074A (en) Production of sis structure
JPS54162490A (en) Manufacture of semiconductor device
JPS5322382A (en) Production of dielectric isolating substrate
JPS539489A (en) Production of semiconductor device
JPS5458389A (en) Forming method of polyimide film in semiconductor device
JPS5513995A (en) Method of producing a semiconductor device
JPS5710225A (en) Forming method for silicon single crystalline film
JPS5382260A (en) Production of semiconductor device
JPS5231665A (en) Growing method of semiconductor crystal
JPS5356981A (en) Production of semiconductor device