JPS5452988A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5452988A
JPS5452988A JP11958977A JP11958977A JPS5452988A JP S5452988 A JPS5452988 A JP S5452988A JP 11958977 A JP11958977 A JP 11958977A JP 11958977 A JP11958977 A JP 11958977A JP S5452988 A JPS5452988 A JP S5452988A
Authority
JP
Japan
Prior art keywords
substrate
layer
type
rear surface
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11958977A
Other languages
Japanese (ja)
Inventor
Yuuji Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11958977A priority Critical patent/JPS5452988A/en
Publication of JPS5452988A publication Critical patent/JPS5452988A/en
Pending legal-status Critical Current

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  • Bipolar Transistors (AREA)

Abstract

PURPOSE: To secure an easy reduction of the collector resistance by providing both the high impurity density diffusion layer and the high impurity density epitaxial layer of the same conduction type to the rear surface of the uni-conductive substrate with the overall thickness increased and then polishing the substrate surface into a prescribed thickness to form the PN junction there.
CONSTITUTION: The rear surface of N- -tye Si substrate 11 is polished to a mirror surface; SiO2 film 15 is formed on the entire surface of substrate 11; and film 15 on the rear surface is removed. Then the N-type impurity is diffused through the exposed rear surface to form N+-type layer 12, and N+-type single- crystal layer or poly-crystal layer 12' are stacked on layer 12 via the vapor growth using SiH2Cl or the like. Thus, the overall thickness is increased for substrate 11, and then the substrate is polished from the side of film 15 into a prescribed thickness to form P-type region 13 through diffusion. Then N-type region 14 is provided within region 13 to form a transistor. In this way, the thikness of layer 12' cab be increased freely, thus lowering the collector resistance enough as well as increasing the mechanical strength
COPYRIGHT: (C)1979,JPO&Japio
JP11958977A 1977-10-04 1977-10-04 Semiconductor device Pending JPS5452988A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11958977A JPS5452988A (en) 1977-10-04 1977-10-04 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11958977A JPS5452988A (en) 1977-10-04 1977-10-04 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5452988A true JPS5452988A (en) 1979-04-25

Family

ID=14765105

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11958977A Pending JPS5452988A (en) 1977-10-04 1977-10-04 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5452988A (en)

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