JPS54158183A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS54158183A JPS54158183A JP6667978A JP6667978A JPS54158183A JP S54158183 A JPS54158183 A JP S54158183A JP 6667978 A JP6667978 A JP 6667978A JP 6667978 A JP6667978 A JP 6667978A JP S54158183 A JPS54158183 A JP S54158183A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- wiring
- positive resist
- hole
- evaporated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To enable formation the through-hole in a minute and easy way when forming the multi-layer wiring by using the positive resist for the etching mask and also adopting the dry etching method utilizing the O2 plasma.
CONSTITUTION: Circuit element region 2 and 3 are formed on Si substrate 1, and the hole part is formed to oxide film 4 on the surface of the substrate. Then part of both regions 2 and 3 are exposed, and 1st layer wiring metal 5 is evaporated on the exposed regions to form the 1st wiring pattern. After this, polyimide resin layer 6 is formed over the entire surface. Then positive resist 10 advantageous to the microprocessing is applied with opening part 8 provided. In this case, the thickness is set for layer 6 and 10 so that the etching time may be identical for both layers each other. Then the dry etching is given selectively via the O2 plasma to make layer 6 reach up to wiring layer 5, and through-hole 8 is provided. Then 2nd wiring metal 9 is evaporated, and then the undesired areas are removed. Thus, the positive resist can be utilized with a large thickness secured for the film, eliminating occurrence of the pinhole or the like. Accordingly, the micro patterning becomes possible.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6667978A JPS54158183A (en) | 1978-06-05 | 1978-06-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6667978A JPS54158183A (en) | 1978-06-05 | 1978-06-05 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS54158183A true JPS54158183A (en) | 1979-12-13 |
Family
ID=13322844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6667978A Pending JPS54158183A (en) | 1978-06-05 | 1978-06-05 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54158183A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59201443A (en) * | 1983-04-28 | 1984-11-15 | Hamamatsu Photonics Kk | Manufacture of semiconductor device |
| US4693780A (en) * | 1985-02-22 | 1987-09-15 | Siemens Aktiengesellschaft | Electrical isolation and leveling of patterned surfaces |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5144065A (en) * | 1974-10-10 | 1976-04-15 | Kazuji Kumagai | RENZAIYOHABURATSUSHI |
| JPS51117136A (en) * | 1975-04-09 | 1976-10-15 | Tokyo Shibaura Electric Co | Plasma etching process |
| JPS5458389A (en) * | 1977-10-18 | 1979-05-11 | Sanyo Electric Co Ltd | Forming method of polyimide film in semiconductor device |
-
1978
- 1978-06-05 JP JP6667978A patent/JPS54158183A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5144065A (en) * | 1974-10-10 | 1976-04-15 | Kazuji Kumagai | RENZAIYOHABURATSUSHI |
| JPS51117136A (en) * | 1975-04-09 | 1976-10-15 | Tokyo Shibaura Electric Co | Plasma etching process |
| JPS5458389A (en) * | 1977-10-18 | 1979-05-11 | Sanyo Electric Co Ltd | Forming method of polyimide film in semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59201443A (en) * | 1983-04-28 | 1984-11-15 | Hamamatsu Photonics Kk | Manufacture of semiconductor device |
| US4693780A (en) * | 1985-02-22 | 1987-09-15 | Siemens Aktiengesellschaft | Electrical isolation and leveling of patterned surfaces |
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