JPS54102864A - Diffusion method for impurity - Google Patents

Diffusion method for impurity

Info

Publication number
JPS54102864A
JPS54102864A JP885278A JP885278A JPS54102864A JP S54102864 A JPS54102864 A JP S54102864A JP 885278 A JP885278 A JP 885278A JP 885278 A JP885278 A JP 885278A JP S54102864 A JPS54102864 A JP S54102864A
Authority
JP
Japan
Prior art keywords
tube
gas
furnace core
core tube
semiconductor substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP885278A
Other languages
Japanese (ja)
Inventor
Fumio Tobioka
Takahiro Fujisaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP885278A priority Critical patent/JPS54102864A/en
Publication of JPS54102864A publication Critical patent/JPS54102864A/en
Pending legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE: To perform uniform diffusion for all the semiconductor substrates, by inserting the arrangement of semiconductor substrates in the furnace core tube and by positioning the throttle plates at specified position through insertion.
CONSTITUTION: The mixing gas of N and a trace of 0 gas is introduced in the furnace core tube 2 of the heater 1 from the gas supply 3 connected to one of this tube, making the tube into oxidizing atmosphere. The arrangement 4 of the semiconductor substrates 41... 4n is inserted in the tube from other end of the furnace core tube and the throttle plates 5 are inserted and they are placed at the specified position. After that, when the semiconductor substrate temperature reaches a given temperature, the phosphorus oxychloride 7 is fed in the furnace core tube after being mixed with the carrier gas being N gas from the saturator 6. The in-furnace is changed into gaseous atmosphere including impurity phosphorus for filling, and when a given time is elapsed with this condition, each semiconductor substrate is formed on the surface and the N type diffusion layer can uniformaly be formed.
COPYRIGHT: (C)1979,JPO&Japio
JP885278A 1978-01-31 1978-01-31 Diffusion method for impurity Pending JPS54102864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP885278A JPS54102864A (en) 1978-01-31 1978-01-31 Diffusion method for impurity

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP885278A JPS54102864A (en) 1978-01-31 1978-01-31 Diffusion method for impurity

Publications (1)

Publication Number Publication Date
JPS54102864A true JPS54102864A (en) 1979-08-13

Family

ID=11704258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP885278A Pending JPS54102864A (en) 1978-01-31 1978-01-31 Diffusion method for impurity

Country Status (1)

Country Link
JP (1) JPS54102864A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4613381A (en) * 1983-11-30 1986-09-23 Kabushiki Kaisha Toshiba Method for fabricating a thyristor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4613381A (en) * 1983-11-30 1986-09-23 Kabushiki Kaisha Toshiba Method for fabricating a thyristor

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