JPS58176925A - Diffusion of phosphor over silicon plate - Google Patents
Diffusion of phosphor over silicon plateInfo
- Publication number
- JPS58176925A JPS58176925A JP6058482A JP6058482A JPS58176925A JP S58176925 A JPS58176925 A JP S58176925A JP 6058482 A JP6058482 A JP 6058482A JP 6058482 A JP6058482 A JP 6058482A JP S58176925 A JPS58176925 A JP S58176925A
- Authority
- JP
- Japan
- Prior art keywords
- diffusion
- silicon plate
- phosphor
- silicon
- gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 26
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 26
- 239000010703 silicon Substances 0.000 title claims abstract description 26
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 title claims abstract description 19
- 238000009792 diffusion process Methods 0.000 title abstract description 12
- 239000007789 gas Substances 0.000 claims abstract description 17
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 9
- 239000001257 hydrogen Substances 0.000 claims abstract description 9
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims abstract description 8
- 229910052698 phosphorus Inorganic materials 0.000 claims description 15
- 239000011574 phosphorus Substances 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 7
- 238000005215 recombination Methods 0.000 abstract description 7
- 230000006798 recombination Effects 0.000 abstract description 7
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 3
- 239000000203 mixture Substances 0.000 abstract description 2
- 239000010453 quartz Substances 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007888 film coating Substances 0.000 description 1
- 238000009501 film coating Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 150000003017 phosphorus Chemical class 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、例えばトランジスタのＮ形エミッタ層形成の
ために行うシリコン板へのりんの拡散方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for diffusing phosphorus into a silicon plate, for example, for forming an N-type emitter layer of a transistor.
トランジスタの製造のために、Ｎ形シリコン板を用い、
例えばほう素の拡散によりＰベース層を形成し、さらに
その中にエミツタ層を形成するためにりんを拡散するこ
とは広く行われている。このような拡散は、例えば第１
図に示すように加熱炉１を貫通する石英管２内にシリコ
ン板３を支持する石英支持体４を挿入してりんを含むふ
ん囲気中で加熱することにより拡散する。この場合ガス
導入口より導入されるガスは第２図に示すように支持体
重の炉内挿入前には−ガスであり、挿入後は町、０．お
よびＰの混合ガスを通して期間Ｔにわたって約１２００
’Ｏの温度で拡散を行い、次いで炉温を降下させること
によりシリコン板の温度を６００〜８００’Ｏにして表
面に馬０．によりシリコン酸化膜を形成した後、Ｎ、ガ
スふん囲気中で炉冷するか、炉外へ取り出す。しかしこ
の方法でつくられたトランジスタにおいては、表面の再
結合速度が早く、直流電流増幅率五ＦＥ のばらつき
が大きいという欠点艙あった。For the manufacture of transistors, N-type silicon plates are used,
For example, it is widely practiced to form a P base layer by diffusing boron, and then diffusing phosphorus therein to form an emitter layer. Such diffusion can occur, for example, in the first
As shown in the figure, a quartz support 4 supporting a silicon plate 3 is inserted into a quartz tube 2 passing through a heating furnace 1, and the silicon plate 3 is heated in an atmosphere containing phosphorus, thereby diffusing. In this case, the gas introduced from the gas inlet is -gas before the support weight is inserted into the furnace, as shown in Fig. 2, and after the insertion, it is -gas, 0. and P over a period T through a gas mixture of about 1200
Diffusion is carried out at a temperature of 0.95°C, and then the temperature of the silicon plate is set to 600-800°C by lowering the furnace temperature, and the temperature of the silicon plate is 600 to 800.0°C. After forming a silicon oxide film using the method described above, it is either cooled in a furnace under an atmosphere of nitrogen or gas, or taken out of the furnace. However, the transistors manufactured by this method had drawbacks such as high surface recombination speed and large variations in DC current amplification factor 5FE.
本発明はこの欠点を除き小さい表面再結合速度が得られ
るりんの拡散方法を提供することを目的とする。It is an object of the present invention to provide a phosphorus diffusion method that eliminates this drawback and provides a low surface recombination rate.
この目的は、１２００”Ｏ付近の高温部とａ ｏ ｏ＠
ａ付近の低温部とを有する管の高温部にシリコン板を置
いて管にりんを含むガスを通流し、次いで管の低温部に
シリコン板を移動させ、管に水素を含むガスを通流する
ことによって達成される。The purpose of this is to connect the high temperature area near 1200"O
A silicon plate is placed in the high-temperature part of the tube that has a low-temperature part near a, and a gas containing phosphorus is passed through the tube.Then, the silicon plate is moved to the low-temperature part of the tube, and a gas containing hydrogen is passed through the tube. This is achieved by
以下図を引用して本発明の実施例について説明する。第
３図に示すように、石英管２は高温炉１および低温炉６
を貫通している。シリコン板３を支持する支持休養を先
ず高温炉１の中まで挿入し、第４図に示すようにＮい０
．およびＰの混合ガスをガス導入口５から導入し、約１
２００’Ｏに加熱されたシリコン板３にりんが所定の深
さまで拡散するように期間Ｔ、にわたって保持する。次
いで導入ガスをＭ、のみに変えて支持体４を低温炉６の
中まで移動させ、同時に導入ガスに水素を混じて水素処
理を期間Ｔ、にわたり行う。このあとシリコン板３を炉
冷するか、炉外へ引き出す。このようにしてりんを拡散
して形成された酸化膜被覆のないシリコン板の表面再結
合速度は小さく、その結果でき上ったトランジスタのル
１．は大きく、そのばら付きが小さい。Embodiments of the present invention will be described below with reference to the drawings. As shown in FIG. 3, the quartz tube 2 is connected to a high temperature furnace 1 and a low temperature furnace 6.
penetrates through. First, insert the support support supporting the silicon plate 3 into the high temperature furnace 1, and as shown in FIG.
．． A mixed gas of
The silicon plate 3 heated to 200'O is held for a period T so that phosphorus is diffused to a predetermined depth. Next, the introduced gas is changed to only M, and the support 4 is moved into the low temperature furnace 6. At the same time, hydrogen is mixed with the introduced gas to perform hydrogen treatment over a period T. After this, the silicon plate 3 is cooled in the furnace or pulled out of the furnace. The surface recombination rate of a silicon plate without an oxide film coating formed by diffusing phosphorus in this way is low, and as a result, the resulting transistor has a low recombination rate. is large and its variation is small.
以上述べたように本発明はりん拡散時にＰ２Ｏ。As described above, the present invention uses P2O during phosphorus diffusion.
による表面へのシリコン酸化膜の形成を行わず、拡散後
表面に水素処理を施すことによりりん拡散後のシリコン
板の表面再結合速度を小さくするものであり、しかも水
素処理の際シリコン板を外気にさらすことがないので、
常に同様な表面状態が得られる。従ってこのりん拡散を
トランジスタのエミッタ拡散に適用することにより、す
、が高くかつそのばらつきの小さいトランジスタを歩留
りよく製造することができ、水素処理工程の前にシリコ
ン板の洗浄工程をはさむ必要がないので手数がかからな
いなど、本発明の効果はすこぶる高い。This method reduces the surface recombination speed of the silicon plate after phosphorus diffusion by applying hydrogen treatment to the surface after diffusion without forming a silicon oxide film on the surface. Because it is not exposed to
A similar surface condition is always obtained. Therefore, by applying this phosphorus diffusion to the emitter diffusion of a transistor, it is possible to manufacture transistors with a high level of phosphorus and a small variation in phosphorus with a high yield, and there is no need to insert a cleaning process of the silicon plate before the hydrogen treatment process. Therefore, the effects of the present invention are extremely high, such as requiring no effort.
第１図は従来のりん拡散のための装置の一例の断面図、
゛第２図はその場合のシリコン板の温度経過線図、第３
図は本発明の一実施例に用いる装置の断面図、第４図は
その場合のシリコン板の温度経過線図である。
１：高温炉、２：石英管、３：シリコン板、６：低温炉
。Figure 1 is a cross-sectional view of an example of a conventional phosphorus diffusion device;
゛Figure 2 is the temperature progression diagram of the silicon plate in that case, Figure 3
The figure is a sectional view of an apparatus used in an embodiment of the present invention, and FIG. 4 is a temperature course diagram of a silicon plate in that case. 1: High temperature furnace, 2: Quartz tube, 3: Silicon plate, 6: Low temperature furnace.
Claims (1)
部とを有する管の高温部にシリコン板を置いて管にりん
を含むガスを通流し、次いで前記管の低温部にシリコン
板を移動させ、管に水素を含むガスを通流することを特
徴とするシリコン板へのりん拡散方法。1) A silicon plate is placed in the high temperature part of a tube that has a high temperature part around 1200@o and a low temperature part around aoo''o, and a gas containing phosphorus is passed through the tube, and then a silicon plate is placed in the low temperature part of the tube. A method for diffusing phosphorus into a silicon plate, characterized by passing a gas containing hydrogen through a tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6058482A JPS58176925A (en) | 1982-04-12 | 1982-04-12 | Diffusion of phosphor over silicon plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6058482A JPS58176925A (en) | 1982-04-12 | 1982-04-12 | Diffusion of phosphor over silicon plate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58176925A true JPS58176925A (en) | 1983-10-17 |
Family
ID=13146431
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6058482A Pending JPS58176925A (en) | 1982-04-12 | 1982-04-12 | Diffusion of phosphor over silicon plate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58176925A (en) |
-
1982
- 1982-04-12 JP JP6058482A patent/JPS58176925A/en active Pending
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