JPH1185618A5 - - Google Patents

Info

Publication number
JPH1185618A5
JPH1185618A5 JP1998174401A JP17440198A JPH1185618A5 JP H1185618 A5 JPH1185618 A5 JP H1185618A5 JP 1998174401 A JP1998174401 A JP 1998174401A JP 17440198 A JP17440198 A JP 17440198A JP H1185618 A5 JPH1185618 A5 JP H1185618A5
Authority
JP
Japan
Prior art keywords
data
tlb
purge
virtual memory
data movement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1998174401A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1185618A (ja
JP3889879B2 (ja
Filing date
Publication date
Priority claimed from US08/881,196 external-priority patent/US6668314B1/en
Application filed filed Critical
Publication of JPH1185618A publication Critical patent/JPH1185618A/ja
Publication of JPH1185618A5 publication Critical patent/JPH1185618A5/ja
Application granted granted Critical
Publication of JP3889879B2 publication Critical patent/JP3889879B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP17440198A 1997-06-24 1998-06-22 仮想メモリ変換を制御する方法 Expired - Fee Related JP3889879B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/881,196 US6668314B1 (en) 1997-06-24 1997-06-24 Virtual memory translation control by TLB purge monitoring
US881,196 1997-06-24

Publications (3)

Publication Number Publication Date
JPH1185618A JPH1185618A (ja) 1999-03-30
JPH1185618A5 true JPH1185618A5 (enExample) 2005-04-07
JP3889879B2 JP3889879B2 (ja) 2007-03-07

Family

ID=25377975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17440198A Expired - Fee Related JP3889879B2 (ja) 1997-06-24 1998-06-22 仮想メモリ変換を制御する方法

Country Status (2)

Country Link
US (2) US6668314B1 (enExample)
JP (1) JP3889879B2 (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6668314B1 (en) * 1997-06-24 2003-12-23 Hewlett-Packard Development Company, L.P. Virtual memory translation control by TLB purge monitoring
US6766472B2 (en) * 2000-09-22 2004-07-20 Microsoft Corporation Systems and methods for replicating virtual memory on a host computer and debugging using the replicated memory
US20020087765A1 (en) * 2000-12-29 2002-07-04 Akhilesh Kumar Method and system for completing purge requests or the like in a multi-node multiprocessor system
US7430643B2 (en) * 2004-12-30 2008-09-30 Sun Microsystems, Inc. Multiple contexts for efficient use of translation lookaside buffer
US7506132B2 (en) * 2005-12-22 2009-03-17 International Business Machines Corporation Validity of address ranges used in semi-synchronous memory copy operations
US8032716B2 (en) * 2008-02-26 2011-10-04 International Business Machines Corporation System, method and computer program product for providing a new quiesce state
US8019922B2 (en) * 2008-10-21 2011-09-13 International Business Machines Corporation Interruption facility for adjunct processor queues
US20110219016A1 (en) * 2010-03-04 2011-09-08 Src, Inc. Stream Mining via State Machine and High Dimensionality Database
US10248573B2 (en) 2016-07-18 2019-04-02 International Business Machines Corporation Managing memory used to back address translation structures
US10168902B2 (en) 2016-07-18 2019-01-01 International Business Machines Corporation Reducing purging of structures associated with address translation
US10180909B2 (en) 2016-07-18 2019-01-15 International Business Machines Corporation Host-based resetting of active use of guest page table indicators
US10162764B2 (en) 2016-07-18 2018-12-25 International Business Machines Corporation Marking page table/page status table entries to indicate memory used to back address translation structures
US10176110B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Marking storage keys to indicate memory used to back address translation structures
US10282305B2 (en) 2016-07-18 2019-05-07 International Business Machines Corporation Selective purging of entries of structures associated with address translation in a virtualized environment
US10802986B2 (en) 2016-07-18 2020-10-13 International Business Machines Corporation Marking to indicate memory used to back address translation structures
US10176111B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Host page management using active guest page table indicators
US10176006B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Delaying purging of structures associated with address translation
US10241924B2 (en) 2016-07-18 2019-03-26 International Business Machines Corporation Reducing over-purging of structures associated with address translation using an array of tags
US10223281B2 (en) 2016-07-18 2019-03-05 International Business Machines Corporation Increasing the scope of local purges of structures associated with address translation
US10169243B2 (en) 2016-07-18 2019-01-01 International Business Machines Corporation Reducing over-purging of structures associated with address translation
US10169233B2 (en) * 2017-06-05 2019-01-01 International Business Machines Corporation Translation lookaside buffer purging with concurrent cache updates
US10353825B2 (en) 2017-06-16 2019-07-16 International Business Machines Corporation Suspending translation look-aside buffer purge execution in a multi-processor environment

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4456954A (en) * 1981-06-15 1984-06-26 International Business Machines Corporation Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations
JPS59227098A (ja) * 1983-06-08 1984-12-20 Fujitsu Ltd Ｔｌｂパ−ジリカバリ方式
JPS60254346A (ja) * 1984-05-31 1985-12-16 Toshiba Corp マルチプロセツサシステム
US5574936A (en) * 1992-01-02 1996-11-12 Amdahl Corporation Access control mechanism controlling access to and logical purging of access register translation lookaside buffer (ALB) in a computer system
JPH0784883A (ja) * 1993-09-17 1995-03-31 Hitachi Ltd 仮想計算機システムのアドレス変換バッファパージ方法
JPH07248974A (ja) * 1994-03-10 1995-09-26 Hitachi Ltd 情報処理装置
US5906001A (en) * 1996-12-19 1999-05-18 Intel Corporation Method and apparatus for performing TLB shutdown operations in a multiprocessor system without invoking interrup handler routines
US6668314B1 (en) * 1997-06-24 2003-12-23 Hewlett-Packard Development Company, L.P. Virtual memory translation control by TLB purge monitoring
US5966733A (en) * 1997-06-24 1999-10-12 Hewlett-Packard Company Optimizing data movement with hardware operations

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