JPH11503589A - 黒レベル設定 - Google Patents
黒レベル設定Info
- Publication number
- JPH11503589A JPH11503589A JP9527439A JP52743997A JPH11503589A JP H11503589 A JPH11503589 A JP H11503589A JP 9527439 A JP9527439 A JP 9527439A JP 52743997 A JP52743997 A JP 52743997A JP H11503589 A JPH11503589 A JP H11503589A
- Authority
- JP
- Japan
- Prior art keywords
- value
- control
- black level
- gain
- iref1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001419 dependent effect Effects 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 6
- 238000005259 measurement Methods 0.000 description 9
- 241000255925 Diptera Species 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/57—Control of contrast or brightness
- H04N5/59—Control of contrast or brightness in dependence upon beam current of cathode ray tube
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/16—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/645—Beam current control means
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/72—Circuits for processing colour signals for reinsertion of DC and slowly varying components of colour signals
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Processing Of Color Television Signals (AREA)
- Picture Signal Circuits (AREA)
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.第1の所定の比を有する少なくとも2つの互いに異なる制御値(Vd1,Vd2 )を供給する手段(42)と、 前記少なくとも2つの互いに異なる制御値(Vd1,Vd2)に応答して黒レベ ル及び利得を制御する制御手段(35,3,7,15)と、 を具える黒レベル及び利得設定装置において、 前記第1の所定の比と所定の関係を有する第2の所定の比を有する少なくと も2つの互いに異なる基準値(Iref1,Iref2)を前記少なくとも2つの互いに 異なる制御値に対応して前記制御手段(35,3,7,15)に供給する手段( 47)と、 第1の制御値(Vd1)と第1の基準値(Iref1)に依存する第1の誤差値を 積分して黒レベル設定値を得る第1手段(43)と、 第2の制御値(Vd2)と第2の基準値(Iref2)に依存する第2の誤差値を 積分して利得設定値を得る第2手段(44)と、 を具えることを特徴とする黒レベル及び利得制御設定装置。 2.リーク電流及び/又は妨害電流に対応する第3の誤差値を積分して前記制御 手段(35,3,7,15)をリーク電流及び/又は妨害電流に対し補償する補 償値(Ic )を得る第3の手段(49)を更に具えることを特徴とする請求項1 記載の黒レベル及び利得制御設定装置。 3.第1の校正フェーズ(F1)中に前記第1の制御値(Vd1)及び前記第1の 基準値(Iref1)を供給し、前記第1の誤差値を積分し(43)、第2の校正フ ェーズ(F2)中に前記第2の制御値(Vd2)及び前記第2の基準値(Iref2) を供給し、前記第2の誤差値を積分する(44)ことを特徴とする請求項1記載 の黒レベル及び利得制御設定装置。 4.前記第1の所定の比(Vd1/Vd2)と前記第2の所定の比(Iref1/Iref2 )との間の所定の関係は(Vd1/Vd2)γ=(Iref1/Iref2)により与えられる ことを特徴とする請求項1記載の黒レベル及び利得制御設定装置。 5.前記第1の所定の比(Vd1/Vd2)がVd1/Vd2=2/3により与えられ、 前記第2の所定の比(Iref1/Iref2)がIref1/Iref2=2/5により与えら れることを特徴とする請求項4記載の黒レベル及び利得制御設定装置。 6.第1の所定の比を有する少なくとも2つの互いに異なる制御値(Vd1,Vd2 )を供給するステップ(42)と、 前記少なくとも2つの互いに異なる制御値(Vd1,Vd2)に応答して黒レベ ル及び利得を制御するステップ(35,3,7,15)と、 を具える黒レベル及び利得制御設定方法において、 前記第1の所定の比と所定の関係を有する第2の所定の比を有する少なくと も2つの互いに異なる基準値(Iref1,Iref2)を前記少なくとも2つの互いに 異なる制御値(Vd1,Vd2)に対応して前記制御ステップ(35,3,7,15 )に供給するステップ(47)と、 第1の制御値(Vd1)と第1の基準値(Iref1)に依存する第1の誤差値を 積分して黒レベル設定値を得るステップ(43)と、 第2の制御値(Vd2)と第2の基準値(Iref2)に依存する第2の誤差値を 積分して利得設定値を得るステップ(44)と、 を具えることを特徴とする黒レベル利得制御設定方法。 7.表示装置(D)と、 前記表示装置にカソード電流(Ik )を供給する請求項1に記載された黒レ ベル及び利得制御設定装置と、 を具えることを特徴とする表示装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT96200192.1 | 1996-01-29 | ||
EP96200192 | 1996-01-29 | ||
PCT/IB1997/000016 WO1997028525A2 (en) | 1996-01-29 | 1997-01-16 | Black level setting |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11503589A true JPH11503589A (ja) | 1999-03-26 |
JP4070239B2 JP4070239B2 (ja) | 2008-04-02 |
Family
ID=8223614
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52743997A Expired - Fee Related JP4070239B2 (ja) | 1996-01-29 | 1997-01-16 | 黒レベル設定 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5892337A (ja) |
EP (1) | EP0818034B1 (ja) |
JP (1) | JP4070239B2 (ja) |
KR (1) | KR100429327B1 (ja) |
DE (1) | DE69738797D1 (ja) |
WO (1) | WO1997028525A2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10145807A (ja) * | 1996-11-12 | 1998-05-29 | Matsushita Electric Ind Co Ltd | オートカットオフ回路 |
EP1125442B1 (en) * | 1998-09-25 | 2003-12-03 | STMicroelectronics Asia Pacific Pte Ltd. | A digital cut-off control loop for tv using speeding and blanking circuits |
KR20010024995A (ko) | 1999-03-11 | 2001-03-26 | 롤페스 요하네스 게라투스 알베르투스 | 차단 레벨 설정 디바이스, 방법 및 디스플레이 장치 |
JP3844430B2 (ja) * | 2001-06-26 | 2006-11-15 | 三菱電機株式会社 | 映像信号処理装置および映像信号処理方法 |
JP3722740B2 (ja) * | 2001-11-05 | 2005-11-30 | 三菱電機株式会社 | 映像処理装置及び映像処理方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4370674A (en) * | 1981-03-03 | 1983-01-25 | Zenith Radio Corporation | Stabilization network for a cathode ray tube |
US5278476A (en) * | 1991-11-13 | 1994-01-11 | U.S. Philips Corporation | Display device including a black level setting circuit |
-
1997
- 1997-01-16 WO PCT/IB1997/000016 patent/WO1997028525A2/en active IP Right Grant
- 1997-01-16 EP EP97900023A patent/EP0818034B1/en not_active Expired - Lifetime
- 1997-01-16 KR KR1019970706922A patent/KR100429327B1/ko not_active IP Right Cessation
- 1997-01-16 DE DE69738797T patent/DE69738797D1/de not_active Expired - Lifetime
- 1997-01-16 JP JP52743997A patent/JP4070239B2/ja not_active Expired - Fee Related
- 1997-01-23 US US08/788,734 patent/US5892337A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR19980703518A (ko) | 1998-11-05 |
JP4070239B2 (ja) | 2008-04-02 |
DE69738797D1 (de) | 2008-08-14 |
WO1997028525A2 (en) | 1997-08-07 |
EP0818034A2 (en) | 1998-01-14 |
EP0818034B1 (en) | 2008-07-02 |
WO1997028525A3 (en) | 1997-10-02 |
US5892337A (en) | 1999-04-06 |
KR100429327B1 (ko) | 2004-07-31 |
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