JPH11162973A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH11162973A
JPH11162973A JP9327608A JP32760897A JPH11162973A JP H11162973 A JPH11162973 A JP H11162973A JP 9327608 A JP9327608 A JP 9327608A JP 32760897 A JP32760897 A JP 32760897A JP H11162973 A JPH11162973 A JP H11162973A
Authority
JP
Japan
Prior art keywords
ion implantation
ions
implanted
implantation step
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9327608A
Other languages
English (en)
Japanese (ja)
Inventor
Minoru Higuchi
実 樋口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP9327608A priority Critical patent/JPH11162973A/ja
Priority to KR1019980051392A priority patent/KR19990045667A/ko
Publication of JPH11162973A publication Critical patent/JPH11162973A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66015Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene
    • H01L29/66037Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66045Field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP9327608A 1997-11-28 1997-11-28 半導体装置の製造方法 Pending JPH11162973A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9327608A JPH11162973A (ja) 1997-11-28 1997-11-28 半導体装置の製造方法
KR1019980051392A KR19990045667A (ko) 1997-11-28 1998-11-27 반도체 장치의 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9327608A JPH11162973A (ja) 1997-11-28 1997-11-28 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
JPH11162973A true JPH11162973A (ja) 1999-06-18

Family

ID=18200966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9327608A Pending JPH11162973A (ja) 1997-11-28 1997-11-28 半導体装置の製造方法

Country Status (2)

Country Link
JP (1) JPH11162973A (ko)
KR (1) KR19990045667A (ko)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244345A (ja) * 2000-02-29 2001-09-07 Fujitsu Ltd 半導体装置の製造方法
JP2001351989A (ja) * 2000-06-05 2001-12-21 Nec Corp 半導体装置の製造方法
WO2002005335A1 (en) * 2000-07-10 2002-01-17 Shin-Etsu Handotai Co.,Ltd. Single crystal wafer and solar battery cell
KR20020014055A (ko) * 2000-08-16 2002-02-25 박종섭 반도체 소자의 게이트 절연막 형성방법
US6388504B1 (en) 1999-09-17 2002-05-14 Nec Corporation Integrated circuit device with switching between active mode and standby mode controlled by digital circuit
JP2006222151A (ja) * 2005-02-08 2006-08-24 Oki Electric Ind Co Ltd 半導体素子の製造方法
JP2009218267A (ja) * 2008-03-07 2009-09-24 Fuji Electric Device Technology Co Ltd 半導体装置の製造方法
JP2012089802A (ja) * 2010-10-22 2012-05-10 Toyota Motor Corp 半導体装置の製造方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4105353B2 (ja) * 1999-07-26 2008-06-25 財団法人国際科学振興財団 半導体装置

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6388504B1 (en) 1999-09-17 2002-05-14 Nec Corporation Integrated circuit device with switching between active mode and standby mode controlled by digital circuit
US6664148B2 (en) 1999-09-17 2003-12-16 Nec Corporation Integrated circuit device with switching between active mode and standby mode controlled by digital circuit
JP2001244345A (ja) * 2000-02-29 2001-09-07 Fujitsu Ltd 半導体装置の製造方法
JP2001351989A (ja) * 2000-06-05 2001-12-21 Nec Corp 半導体装置の製造方法
US6853037B2 (en) 2000-06-05 2005-02-08 Nec Electronics Corporation Fabrication of low power CMOS device with high reliability
WO2002005335A1 (en) * 2000-07-10 2002-01-17 Shin-Etsu Handotai Co.,Ltd. Single crystal wafer and solar battery cell
KR100804247B1 (ko) 2000-07-10 2008-02-20 신에쯔 한도타이 가부시키가이샤 단결정 웨이퍼와 태양전지 셀
US7459720B2 (en) * 2000-07-10 2008-12-02 Shin-Etsu Handotai Co., Ltd. Single crystal wafer and solar battery cell
KR20020014055A (ko) * 2000-08-16 2002-02-25 박종섭 반도체 소자의 게이트 절연막 형성방법
JP2006222151A (ja) * 2005-02-08 2006-08-24 Oki Electric Ind Co Ltd 半導体素子の製造方法
JP2009218267A (ja) * 2008-03-07 2009-09-24 Fuji Electric Device Technology Co Ltd 半導体装置の製造方法
JP2012089802A (ja) * 2010-10-22 2012-05-10 Toyota Motor Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
KR19990045667A (ko) 1999-06-25

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