JPH0983112A - Circuit device with large-output element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit device with a large-output element which can narrow a width dimension and can be miniaturized without increasing the electrical resistance of a line by providing a conductive layer on the surface of the line formed on a board. SOLUTION: In a circuit device 21, an input signal line 24, an output signal line 25, an input bias line 26, and an output bias line 27 are formed as each line on a substrate 22 while they are connected to a power transistor 23. An insulation layer 28 is formed on the substrate 22 while upper side surfaces 24A, 25A, 26A, and 27A of each line are exposed. A solder layer 29 is sealed on the upper side surfaces 24A, 25A, 26A, and 27A of each line, thus making thick the thickness dimension of each line by the solder layer 29 and hence making narrow the width dimension of each line without increasing electrical resistance and forming each line on the substrate 22 with a high density.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit device having a high output element, such as a power transistor, on which a high output element is mounted, and in particular, a line connected to the high output element is formed as a wiring pattern on a substrate. The present invention relates to a circuit device having a high output element.

[0002]

2. Description of the Related Art Generally, as a circuit device having a high output element, for example, a high output amplifier which is used in an automobile telephone or the like and which amplifies a high frequency signal inputted and outputs it as a high output amplified signal can be cited. In this type of high output amplifier, for example, a high output element such as a power transistor is provided on a substrate, and a wiring pattern such as an input / output line connected to the power transistor is formed on the substrate. .

A circuit device having a high-power element according to this type of conventional technology will be described with reference to FIGS. 8 to 11, taking a circuit device having a power transistor as an example.

In the figure, reference numeral 1 denotes a circuit device according to the prior art in which a power transistor is mounted as a high output element. In the circuit device 1, the surface of a substrate 2 is covered with a protective cover 3, and an input side terminal described later is provided. Only the terminals 9 and 10 and the output side terminals 11 and 12 are formed so as to be exposed from the end portion of the substrate 2.

As shown in FIG. 9, the circuit device 1 is formed on the substrate 2 with the cover 3 removed, and the power transistor 4 described later provided on the substrate 2 and the power transistor 4 connected to the power transistor 4. Input signal line 5, output signal line 6, input bias line 7 and output bias line 8 described later, and input side terminals 9 and 10 formed at the end of the substrate 2.
And the output side terminals 11 and 12 in general.

Reference numeral 4 denotes a power transistor as a high output element, and the power transistor 4 is provided on the substrate 2 as shown in FIG. An input terminal 4A and an output terminal 4B are formed on the power transistor 4 so as to project therefrom. An input signal line 5 is connected to the input terminal 4A and an output signal line 6 is connected to the output terminal 4B. The power transistor 4 amplifies the input signal input from the input signal line 5 and outputs it to the output signal line 6 as a high-output output signal.

Reference numeral 5 denotes an input signal line as a line connected to the input side of the power transistor 4. The input signal line 5 is formed on the substrate 2, and the base end side is connected to the input terminal 4A of the power transistor 4. The tip side is located at the end of the substrate 2 and is connected to the input side terminal 9. The input signal input from the input side terminal 9 is input to the input terminal 4A of the power transistor 4 via the input signal line 5.

Reference numeral 6 denotes an output signal line serving as a line connected to the output side of the power transistor 4. The output signal line 6 is formed on the substrate 2 with the power transistor 4 sandwiched between the power transistor 4 and the power transistor 4 at the base end side. Connected to the output terminal 4B of the output terminal 1
Connected to 2. The high-power amplified signal output from the power transistor 4 is output to the outside from the output-side terminal 12 via the output signal line 6.

Reference numerals 7 and 8 denote an input bias line and an output bias line as lines for supplying a driving current to the power transistor 4, respectively. The input bias line 7 and the output bias line 8 are formed on the substrate 2 respectively. ,
The base end side is connected to the input signal line 5 and the output signal line 6, respectively, and the tip end side is located at the end of the substrate 2 and the input side terminal 1
0 and the output side terminal 11 respectively. In addition,
Reference numerals 9 and 10 denote input-side terminals formed at the ends of the substrate 2 so as to project therefrom, and reference numerals 11 and 12 denote similarly-formed output-side terminals.

The circuit device 1 according to the prior art is configured as described above. For example, an input signal input from the input side terminal 9 as a high frequency signal is input to the power transistor 4 via the input signal line 5. The power transistor 4 amplifies this input signal and outputs it as an output signal from the output signal line 6.

As another conventional technique, as shown in FIG. 11, an insulating layer 13 called a solder resist is provided on the substrate 2 for the above-described circuit device 1, and the insulating layer 1 is provided.
There is one in which the input signal line 5, the output signal line 6, the input bias line 7 and the output bias line 8 are covered with 3 to protect them.

In the manufacturing process of the circuit device 1 according to another conventional technique, first, the line pattern forming process is performed.
For example, the input signal line 5, the output signal line 6, the input bias line 7, and the output bias line 8 are formed on the substrate 2 by using a method such as etching. Next, in the insulating layer forming step, the insulating layer 13 is formed on the substrate 2 except for the position where the power transistor 4 is arranged. Then, the input signal line 5 and the output signal line 6 are applied by a solder paste application process.
On the other hand, a plating process is applied to the positions where the input terminal 4A and the output terminal 4B of the power transistor 4 are connected, and a solder paste for mounting the power transistor 4 is applied.

Next, in the high output element mounting process, the power transistor 4 is arranged at a predetermined position on the substrate 2, and the input terminal 4A and the output terminal 4B are connected to the input signal line 5 and the output signal by the applied solder paste. The lines 6 are connected and fixed respectively. Further, the substrate 2 is processed by the reflow process.
Is heated, the applied solder paste is baked, and the input terminal 4A and the output terminal 4 of the power transistor 4 are heated.
B and the input signal line 5 and the output signal line 6 are securely fixed at their respective connection positions to maintain an electrically stable conductive state. Then, finally, the substrate 2 is covered with the cover 3 as a casing, and the circuit device 1 is completed.

[0014]

By the way, in the above-mentioned prior art, a high-frequency current amplified in the power transistor 4 and having an increased amplitude flows in the output signal line 6,
A large direct current flows through the output bias line 8 to drive the power transistor 4. But,
The output signal line 6 and the output bias line 8 are, for example, metal thin films formed on the substrate 2 by etching or the like, and usually have a thickness of several μm to 30 μm. When a current flows, resistance loss causes heat generation, voltage drop, etc., and the circuit device 1
The signal amplification factor and the power of the output signal will decrease.

Therefore, in the circuit device 1 of the prior art, the width dimensions of the output signal line 6 and the output bias line 8 are made sufficiently wide, so that the output signal line 6 and the output bias line 8 having a small thickness dimension are compared with the output signal line 6 and the output bias line 8. To provide a sufficient cross-sectional area to reduce the electric resistance.

However, in the circuit device 1 of the prior art, the output signal line 6 and the output bias line 8 are provided for the reason described above.
Since there is no choice but to form a sufficiently wide width dimension, there is a problem that the area of the substrate 2 cannot be reduced and the circuit device 1 cannot be miniaturized.

On the other hand, in the line pattern forming step of forming the output signal line 6 and the output bias line 8 on the substrate 2, the thickness of the output signal line 6 and the output bias line 8 is made thicker instead of being made narrower. A method of securing the cross-sectional area can be considered. However, in this case, if it is attempted to increase the thickness of the output signal line 6 and the output bias line 8 by etching or the like, it becomes difficult to form a fine line pattern.

The present invention has been made in view of the above-mentioned problems of the prior art. By providing a conductive layer on the surface of the line formed on the substrate, the width dimension can be reduced without increasing the electric resistance of the line. An object of the present invention is to provide a circuit device having a high output element that can be miniaturized.

[0019]

In order to solve the above-mentioned problems, the present invention provides a substrate, a high-power element provided on the substrate as a high-power electronic element, and a connection to the high-power element. The present invention is applied to a circuit device having a high output element including a line formed on the substrate.

A feature of the configuration adopted by the invention of claim 1 is that a conductive layer made of a conductive material is provided on the surface of the line.

According to the second aspect of the invention, the conductive layer is a solder layer formed on the surface of the line.

Further, in the third aspect of the invention, the conductive layer is a metal foil integrally fixed to the surface of the line by using a conductive adhesive or solder.

[0023]

With the above structure, according to the invention of claim 1, since the conductive layer made of a conductive material is provided on the surface of the line, the thickness of the line can be increased by the conductive layer. Thus, the width dimension can be formed narrow without reducing the cross-sectional area of the line.

According to the second aspect of the invention, since the conductive layer is provided by applying the solder layer to the surface of the line, it is possible to mount the high output element in the manufacturing process of the circuit device having the high output element of the prior art. The conductive layer can be formed together in the process of applying the solder paste to the substrate.

According to the third aspect of the invention, since the conductive layer is provided by integrally fixing the metal foil to the surface of the line using the conductive adhesive or solder, it is formed as a separate member in advance. The conductive layer can be formed by fixing the conductive layer to the surface of the line.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION A circuit device having a high output element according to an embodiment of the present invention will be described below with reference to FIGS. In the embodiments, the same reference numerals are given to the same components as those in the related art, and description thereof will be omitted.

First, a first embodiment will be described with reference to FIGS.

In the figure, reference numeral 21 denotes a circuit device having a high output element according to the present embodiment. The circuit device 21 includes a power transistor 23, which will be described later, provided on a substrate 22 like the circuit device 1 according to the prior art. , The input signal line 24,
The output signal line 25, the input bias line 26, the output bias line 27, and the insulating layer 28 are roughly configured, and an input side terminal and an output side terminal (neither of which are shown) are formed at the end of the substrate 22. There is.

Reference numeral 23 denotes a power transistor as a high output element having the same structure as the power transistor 4 in the prior art. The power transistor 23 has an input terminal 23A and an output terminal 23B formed in a protruding manner.
The input terminal 23A and the output terminal 23B are connected to the proximal ends of the input signal line 24 and the output signal line 25, respectively.

24 and 25 are input signal lines as lines,
Output signal lines are respectively shown, and the input signal line 24 and the output signal line 25 are the input terminal 2 of the power transistor 23.
3A and the output terminal 23B are respectively connected to the base end side and provided on the substrate 22. A solder layer 29 described later is formed on the upper side surfaces 24A and 25A of the input signal line 24 and the output signal line 25.

Reference numerals 26 and 27 respectively denote an input bias line and an output bias line as lines, and the input bias line 26 and the output bias line 27 are connected at their proximal ends to the input signal line 24 and the output signal line 25, respectively. Board 2
It is provided on 2. Also, the input bias line 26,
A solder layer 29 is formed on the upper side surfaces 26A and 27A of the output bias line 27.

Reference numeral 28 designates an insulating layer called a solder resist formed on the substrate 22. The insulating layer 28 is formed on the substrate 22 in substantially the same manner as the insulating layer 13 according to the prior art, but in the present embodiment. The input signal line 24, the output signal line 25, the input bias line 26, and the output bias line 27 are formed so as to expose the upper side surfaces 24A, 25A, 26A, and 27A without covering them.

Reference numeral 29 denotes a solder layer as a conductive layer according to this embodiment, and the solder layer 29 is an input signal line 24, an output signal line 25, an input bias line 26, and an output bias line 2.
The upper side surfaces 24A, 25A, 26A, 27A of 7 are formed, for example, by applying solder paste or the like with a sufficient thickness. As a result, the thickness dimensions of the input signal line 24, the output signal line 25, the input bias line 26, and the output bias line 27 are made sufficiently thick to increase the cross-sectional area, and the input signal line 24, the output signal line 25, and the output bias line 27 are integrally fixed to these lines and electrically connected. Maintains a continuous electrical connection.

The circuit device 21 according to the present embodiment has the above-mentioned configuration, and its basic operation is not particularly different from that of the prior art.

Next, the manufacturing process of the circuit device 21 according to this embodiment will be described with reference to FIGS.

First, in FIG. 2, an input signal line 24, an output signal line 25, an input bias line 26, and an output bias line 27 (hereinafter referred to as lines) are formed by the same line pattern forming process as in the prior art. The substrate 22 is shown.

Next, in the insulating layer forming step shown in FIG. 3, the insulating layer 28 is formed on the substrate 22 from the direction of the arrow A using the mask 30 by, for example, an etching process so that the upper surface of each line is formed. 24A, 25A, 26A, 27
Keep A exposed.

Then, in the solder layer forming step shown in FIG. 4, the upper side surfaces 24A, 25A, 26A, 27A of each line are formed.
On the other hand, by applying the solder paste in a sufficient thickness dimension from the direction of arrow B using the mask 31, the solder layer 2
9 are formed on the upper side surfaces 24A, 25A, 26A, 27A, respectively.

At this time, the same solder paste application step as in the prior art is performed at the same time, and the input signal line 24 and the output signal line 25 are connected to the input terminal 23A and the output terminal 23B of the power transistor 23, respectively. A solder paste for mounting the power transistor 23 is applied.

Next, in the reflow process shown in FIG. 5, after the power transistor 23 is arranged at a predetermined position on the substrate 22 by the high power element mounting process similar to the prior art, the substrate is moved in the direction of arrow C. 22 is heated, whereby the solidified solder layer 29 applied as the solder paste is fired and integrally fixed to the upper side surfaces 24A, 25A, 26A, 27A of each line as shown in FIG. , Maintain an electrically stable conductive state. In the reflow process, the substrate 22 may be heated not only from the lower side of the substrate 22 but also from the upper side or the entire circumference.

As described above, the input signal line 24, the output signal line 25, the input bias line 26, and the output bias line 2
Since the solder layer 29 is integrally formed on the upper side surfaces 24A, 25A, 26A, 27A of 7 in an electrically conductive state,
The thickness of each line as a conductor can be increased by the solder layer 29, and thus the cross-sectional area can be increased without increasing the width of each line.

Thus, since the cross-sectional area can be increased and the electric resistance can be reduced as compared with the prior art without widening the width of each line, for example, the output signal line 25 through which an AC current with a large amplitude flows and a large DC current flow. Even when the width dimension of the output bias line 27 and the like that flow is made narrow, the resistance loss does not increase and the heat generation and the voltage drop and the like do not occur when the current is conducted, and each line is arranged at a high density on the substrate 22. You can

Therefore, by arranging the respective lines on the substrate 22 at a high density, the area of the substrate 22 can be reduced and the circuit device 21 can be miniaturized. For example, the circuit device 21 of the present embodiment can be easily arranged inside a device body such as a car phone, and the device body such as a car phone can be downsized.

Further, since the solder layer 29 is formed by applying the solder paste to each line in the solder layer forming step, the solder layer forming step can be performed together with the conventional solder paste applying step. The solder layer 29 is manufactured by a manufacturing process substantially similar to the manufacturing process of the circuit device 1 according to the conventional technique.
Can be easily formed.

Next, FIGS. 6 and 7 show a circuit device having a high output element according to a second embodiment of the present invention. The feature of this embodiment is that a metal foil is formed on the surface of the line by a conductive adhesive or This is because the conductive layer was formed by bonding with solder. In this embodiment, the same components as those of the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the figure, reference numeral 41 indicates a circuit device having a high-power element according to this embodiment.
Similar to the circuit device 21 according to the embodiment of the present invention, the power transistor 43 as a high output element provided on the substrate 42.
And an input signal line 44 and an output signal line 4 as lines
5, input bias line 46 and output bias line 47
And an insulating layer 48, and an input side terminal and an output side terminal (both not shown) are formed at the end of the substrate 42.

Reference numeral 49 denotes a metal foil as a conductive layer according to the present embodiment, which is composed of a metal thin film of, for example, copper or the like uniformly formed with a predetermined thickness dimension, and has an input signal line 44 and an output. Signal line 45, input bias line 4
6, the conductive adhesive layer 5 on the upper side surface 44A, 45A, 46A, 47A of the output bias line 47 (hereinafter referred to as each line)
0, so that each line is configured as a current path with a sufficient thickness dimension.

Reference numeral 50 denotes a conductive adhesive layer made of, for example, a conductive adhesive or solder. The conductive adhesive layer 50 is provided between the upper side surfaces 44A, 45A, 46A, 47A of each line and the metal foil 49. They are applied, and they are electrically connected while fixing (soldering) together.

Thus, in this embodiment having the above-described structure, the same effects as those of the first embodiment can be obtained. In particular, however, in this embodiment, the upper side surfaces 44A of the respective lines,
45A, 46A, 47A via the conductive adhesive layer 50,
Since the metal foil 49 uniformly formed with a sufficient thickness dimension is fixed, the conductive layer can be easily formed by adhering the metal foil 49 as a separate member, and each line is highly accurate to the required thickness dimension. Can be formed, and the reliability of the circuit device 41 can be improved even when the width dimension of each line is narrowed to increase the density of the substrate 42.

In each of the above embodiments, the input signal line 2
4, output signal line 25, input bias line 26 and output bias line 27 (input signal line 44, output signal line 45, input bias line 46 and output bias line 4
Although the solder layer 29 (metal foil 49) is provided for all of 7), the present invention is not limited to this, and a conductive layer may be provided only for a necessary line portion, for example, a relatively small current conducts. The solder layer 29 (metal foil 49) may be omitted for the input signal line 24, the input bias line 26 (the input signal line 44, the input bias line 46) and the like.

Further, in the first embodiment, the solder layer 29 is formed by applying the solder paste, but the present invention is not limited to this. For example, by melting a thread-like solder with a soldering iron, The solder layer 29 may be formed,
Alternatively, the solder layer 29 may be formed by spraying a solder paste with a solder sprayer or the like.

Further, in each of the above-described embodiments, the circuit devices 21 and 41 in which the power transistors 23 and 43 are arranged as the high-power elements are described as an example, but the present invention is not limited to this, and, for example, a thyristor, It may be applied to a circuit device having a high output element such as a regulator.

[0053]

As described in detail above, according to the invention of claim 1, a conductive layer made of a conductive material is provided on the surface of the line, and the thickness of the line is increased by the conductive layer.
The width dimension can be reduced without reducing the cross-sectional area of the line. As a result, the width can be formed narrow without increasing the electric resistance of the line, so that the line can be arranged on the substrate at a high density, the area of the substrate can be reduced, and high output can be achieved. The circuit device having the element can be easily miniaturized.

According to the second aspect of the present invention, since the conductive layer is provided by applying the solder layer on the surface of the line, in the step of applying the solder paste for mounting a high-power element according to the prior art onto the line, The conductive layer can be applied together as a solder paste, and thus, by a process substantially similar to the manufacturing process of the circuit device having the high output element of the prior art,
The conductive layer can be easily formed.

According to the third aspect of the invention, since the conductive layer is provided by integrally fixing the metal foil on the surface of the line with the conductive adhesive or solder, the thickness of the conductive layer is required in advance. By fixing the uniformly formed conductive layer on the surface of the line, it is possible to easily form a uniform conductive layer having a required thickness dimension, and ensure the reliability of the circuit device having the high output element. Can be improved.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing a circuit device according to a first embodiment of the present invention.

FIG. 2 is a vertical cross-sectional view showing a state in which an input signal line, an output signal line, an input bias line and an output bias line are formed on a substrate by a line pattern forming step.

3 is a vertical cross-sectional view showing a state in which an insulating layer is formed on a substrate by an insulating layer forming step following the line pattern forming step shown in FIG.

FIG. 4 is a vertical cross-sectional view showing a state in which a solder layer is formed on an upper surface of an input signal line, an output signal line, an input bias line and an output bias line on a substrate by a solder layer forming process following the insulating layer forming process of FIG. It is a side view.

5 is a vertical cross-sectional view showing a state in which a solder layer is heated after disposing power transistors on a substrate by a reflow processing step following the solder layer forming step in FIG.

FIG. 6 is a vertical sectional view showing a circuit device according to a second embodiment of the present invention.

FIG. 7 is an enlarged vertical cross-sectional view showing enlarged main parts such as an input signal line in FIG. 6;

FIG. 8 is an external perspective view showing a circuit device according to a conventional technique.

9 is a perspective view showing the circuit device in FIG. 8 with a cover removed.

FIG. 10 is a vertical cross-sectional view taken along the arrow XX in FIG.

FIG. 11 is a vertical sectional view similar to FIG. 10, showing another conventional circuit device.

[Explanation of symbols]

 21, 41 Circuit device 22, 42 Substrate 23, 43 Power transistor 24, 44 Input signal line 25, 45 Output signal line 26, 46 Input bias line 27, 47 Output bias line 29 Solder layer 49 Metal foil 50 Conductive adhesive layer

Claims (3)

[Claims] 1. A high output element comprising a substrate, a high output element provided as an electronic element for high output on the substrate, and a line connected to the high output element and formed on the substrate. A circuit device having a high output element, characterized in that a conductive layer made of a conductive material is provided on a surface of the line. 2. The circuit device having a high output element according to claim 1, wherein the conductive layer is a solder layer formed on a surface of the line. 3. The circuit device having a high output element according to claim 1, wherein the conductive layer is a metal foil integrally fixed to the surface of the line by using a conductive adhesive or solder.